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Message-Id: <20211208003727.3596577-3-f.fainelli@gmail.com>
Date: Tue, 7 Dec 2021 16:37:13 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: devicetree@...r.kernel.org
Cc: Florian Fainelli <f.fainelli@...il.com>,
Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
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bcm-kernel-feedback-list@...adcom.com (maintainer:BROADCOM BCM7XXX ARM
ARCHITECTURE), Gregory Fong <gregory.0xf0@...il.com>,
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Subject: [PATCH v3 02/15] dt-bindings: reset: Convert Broadcom STB reset to YAML
Convert the Broadcom STB SW_INIT style reset controller binding to YAML.
Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
.../bindings/reset/brcm,brcmstb-reset.txt | 27 -----------
.../bindings/reset/brcm,brcmstb-reset.yaml | 48 +++++++++++++++++++
2 files changed, 48 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt
create mode 100644 Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt
deleted file mode 100644
index ee59409640f2..000000000000
--- a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Broadcom STB SW_INIT-style reset controller
-===========================================
-
-Broadcom STB SoCs have a SW_INIT-style reset controller with separate
-SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit
-reset lines.
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: should be brcm,brcmstb-reset
-- reg: register base and length
-- #reset-cells: must be set to 1
-
-Example:
-
- reset: reset-controller@...4318 {
- compatible = "brcm,brcmstb-reset";
- reg = <0x8404318 0x30>;
- #reset-cells = <1>;
- };
-
- ðernet_switch {
- resets = <&reset 26>;
- reset-names = "switch";
- };
diff --git a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml
new file mode 100644
index 000000000000..e00efa88a198
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Broadcom STB SW_INIT-style reset controller
+
+description:
+ Broadcom STB SoCs have a SW_INIT-style reset controller with separate
+ SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit
+ reset lines.
+
+ Please also refer to reset.txt in this directory for common reset
+ controller binding usage.
+
+maintainers:
+ - Florian Fainelli <f.fainelli@...il.com>
+
+properties:
+ compatible:
+ const: brcm,brcmstb-reset
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset: reset-controller@...4318 {
+ compatible = "brcm,brcmstb-reset";
+ reg = <0x8404318 0x30>;
+ #reset-cells = <1>;
+ };
+
+ ethernet_switch {
+ resets = <&reset 26>;
+ reset-names = "switch";
+ };
--
2.25.1
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