[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20211210170113.30063-4-flora.fu@mediatek.com>
Date: Sat, 11 Dec 2021 01:01:08 +0800
From: Flora Fu <flora.fu@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
CC: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Flora Fu <flora.fu@...iatek.com>,
"Yong Wu" <yong.wu@...iatek.com>, JB Tsai <jb.tsai@...iatek.com>,
Pi-Cheng Chen <pi-cheng.chen@...iatek.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: [PATCH v4 3/8] dt-bindings: arm: mediatek: Add new document bindings for APU
Document the apusys bindings.
Signed-off-by: Flora Fu <flora.fu@...iatek.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../arm/mediatek/mediatek,apusys.yaml | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
new file mode 100644
index 000000000000..7643c66dfaa2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) 2021 MediaTek Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,apusys.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek APUSYS Controller
+
+maintainers:
+ - Flora Fu <flora.fu@...iatek.com>
+
+description:
+ The MediaTek apusys controller provides functional configurations and clocks
+ to the system.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8192-apu-conn
+ - mediatek,mt8192-apu-vcore
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ apu_conn: apu_conn@...20000 {
+ compatible = "mediatek,mt8192-apu-conn", "syscon";
+ reg = <0x19020000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ - |
+ apu_vcore: apu_vcore@...29000 {
+ compatible = "mediatek,mt8192-apu-vcore", "syscon";
+ reg = <0x19029000 0x1000>;
+ #clock-cells = <1>;
+ };
--
2.18.0
Powered by blists - more mailing lists