| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <163948458175.3584506.7943620757309501715.b4-ty@kernel.org>
Date: Tue, 14 Dec 2021 14:04:32 +0000
From: Will Deacon <will@...nel.org>
To: sgoutham@...vell.com, bbhushan2@...vell.com,
Bhaskara Budiredla <bbudiredla@...vell.com>,
mark.rutland@....com, robh+dt@...nel.org
Cc: catalin.marinas@....com, kernel-team@...roid.com,
Will Deacon <will@...nel.org>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v7 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver
On Mon, 15 Nov 2021 10:05:04 +0530, Bhaskara Budiredla wrote:
> This series introduces performance monitor driver to Last-level-cache
> tag-and-data (LLC-TAD) PMU which is an integral part of Marvell CN10K SoCs.
> The configuration and functionality of the TAD PMU is covered in patch 1.
> The device tree bindings are dealt in patch 2.
>
> v7:
> - use braces around a multi-line conditional statement (Will Deacon)
> - remove mask doesn't do anything (Will Deacon)
> - restrict compile test dependency to aarch64
>
> [...]
Applied to arm64 (for-next/perf-cn10k), thanks!
[1/2] drivers: perf: Add LLC-TAD perf counter support
https://git.kernel.org/arm64/c/036a7584bede
[2/2] dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu bindings
https://git.kernel.org/arm64/c/4cbf47728f8d
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
Powered by blists - more mailing lists