linux-kernel - Re: [PATCH v6 00/10] Add Sunplus SP7021 SoC Support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAK8P3a1Doh8GY9iFZsvmd6wASHoPqyR+roXx0G5XidnmHNkGaA@mail.gmail.com>
Date:   Thu, 16 Dec 2021 09:12:13 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     Qin Jian <qinjian@...lus1.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Russell King - ARM Linux <linux@...linux.org.uk>,
        Mark Brown <broonie@...nel.org>, Arnd Bergmann <arnd@...db.de>,
        Stefan Wahren <stefan.wahren@...e.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        Wells Lu 呂芳騰 <wells.lu@...plus.com>
Subject: Re: [PATCH v6 00/10] Add Sunplus SP7021 SoC Support

On Thu, Dec 16, 2021 at 8:08 AM Qin Jian <qinjian@...lus1.com> wrote:
>
> This patch series add Sunplus SP7021 SoC support.
>
> Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many
> peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a
> single chip. It is designed for industrial control.
>
> SP7021 consists of two chips (dies) in a package. One is called C-chip
> (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level
> process (22 nm) for high performance computing. The other is called P-
> chip (peripheral chip). It has many peripherals and an ARM A926 added
> especially for real-time control. P-chip is made for customers. It adopts
> low-level process (ex: 0.11 um) to reduce cost.
>
> Refer to (for documentations):
> https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
>
> Refer to (applications):
> https://tibbo.com/store/plus1.html
>
> Refer to (applications):
> http://www.sinovoip.com.cn/ecp_view.asp?id=586

This looks all good to me now, it just needs a review for the clk,
reset  and irqchip drivers. I'll won't be pulling any further branches
after the 23rd for this release, so it appears unlikely to still make it
into v5.17, but please keep going anyway. Either Olof will be able
to take the series when I'm gone, or we can do it early for v5.18.

Ideally this should come as a pull request to soc@...nel.org once
you have the remaining Reviewed-by tags, with the text above copied
into the (signed) tag description. If you send it as patches, I'd suggest
adding the text to the description of patch 9/10 instead, where
you add the board code. This way it still becomes part of the git
history for reference.

        Arnd