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Message-ID: <CAG3jFysdAbHYXWv_87vB87Wf75Hev=bpjpNppdhcapb0_-dAfQ@mail.gmail.com>
Date: Thu, 16 Dec 2021 13:05:45 +0100
From: Robert Foss <robert.foss@...aro.org>
To: Stephen Boyd <swboyd@...omium.org>
Cc: Andrzej Hajda <a.hajda@...sung.com>,
Neil Armstrong <narmstrong@...libre.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Rob Clark <robdclark@...omium.org>,
Douglas Anderson <dianders@...omium.org>
Subject: Re: [PATCH] drm/bridge: ti-sn65dsi86: Set max register for regmap
Hi Stephen,
Thanks for submitting this fix.
On Wed, 15 Dec 2021 at 01:25, Stephen Boyd <swboyd@...omium.org> wrote:
>
> Set the maximum register to 0xff so we can dump the registers for this
> device in debugfs.
>
> Fixes: a095f15c00e2 ("drm/bridge: add support for sn65dsi86 bridge driver")
> Cc: Rob Clark <robdclark@...omium.org>
> Cc: Douglas Anderson <dianders@...omium.org>
> Cc: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 6154bed0af5b..83d06c16d4d7 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -188,6 +188,7 @@ static const struct regmap_config ti_sn65dsi86_regmap_config = {
> .val_bits = 8,
> .volatile_table = &ti_sn_bridge_volatile_table,
> .cache_type = REGCACHE_NONE,
> + .max_register = 0xFF,
> };
>
> static void ti_sn65dsi86_write_u16(struct ti_sn65dsi86 *pdata,
>
> base-commit: 136057256686de39cc3a07c2e39ef6bc43003ff6
> --
> https://chromeos.dev
>
Reviewed-by: Robert Foss <robert.foss@...aro.org>
Applied to drm-misc-next
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