linux-kernel - Re: [PATCH 6/7] arm64: dts: exynos: Add initial Exynos850 SoC support

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Message-ID: <73c5a527-2d5d-8524-b067-f9128055ff10@canonical.com>
Date:   Fri, 17 Dec 2021 09:21:48 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To:     Sam Protsenko <semen.protsenko@...aro.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>,
        Jaewon Kim <jaewon02.kim@...sung.com>,
        Chanho Park <chanho61.park@...sung.com>,
        David Virag <virag.david003@...il.com>,
        Youngmin Nam <youngmin.nam@...sung.com>,
        Tomasz Figa <tomasz.figa@...il.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Daniel Palmer <daniel@...f.com>,
        Hao Fang <fanghao11@...wei.com>,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 6/7] arm64: dts: exynos: Add initial Exynos850 SoC support

On 16/12/2021 20:40, Sam Protsenko wrote:
> On Wed, 15 Dec 2021 at 18:47, Krzysztof Kozlowski
> <krzysztof.kozlowski@...onical.com> wrote:
>>

(...)

>>> +             serial0 = &serial_0;
>>> +             serial1 = &serial_1;
>>> +             serial2 = &serial_2;
>>> +             i2c0 = &i2c_0;
>>> +             i2c1 = &i2c_1;
>>> +             i2c2 = &i2c_2;
>>> +             i2c3 = &i2c_3;
>>> +             i2c4 = &i2c_4;
>>> +             i2c5 = &i2c_5;
>>> +             i2c6 = &i2c_6;
>>> +             i2c7 = &hsi2c_0;
>>> +             i2c8 = &hsi2c_1;
>>> +             i2c9 = &hsi2c_2;
>>> +             i2c10 = &hsi2c_3;
>>> +             i2c11 = &hsi2c_4;
>>> +     };
>>> +
>>> +     arm-pmu {
>>> +             compatible = "arm,cortex-a55-pmu";
>>> +             interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
>>> +             interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
>>> +                                  <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
>>> +     };
>>> +
>>> +     /* Main system clock (XTCXO); external, must be 26 MHz */
>>> +     oscclk: clock-oscclk {
>>> +             compatible = "fixed-clock";
>>> +             clock-output-names = "oscclk";
>>> +             #clock-cells = <0>;
>>> +     };
>>> +
>>> +     /* RTC clock (XrtcXTI); external, must be 32.768 kHz */
>>
>> This clock is usually provided by PMIC, so instead I expect updating
>> s2mps11-clk driver. It's not correct to mock it with fixed-clock, but in
>> some cases might be needed. Then I would need an explanation and maybe a
>> TODO note.
>>
>> I wonder if we already discussed this...
>>
> 
> Don't really remember discussing that. That's actually something new
> for me :) I was planning to add PMIC support as a part of separate
> activity later, it might not be so easy: S2MPU12 uses I3C connection.
> And RTC clock is not handled even in downstream kernel. So I'll have
> to implement that by PMIC datasheet. I'll keep some TODO comment for
> now, hope it's ok with you?

Assuming it is really coming from the PMIC (should be visible in the
board schematics), it should be using s2mps11-clk. I am fine with
keeping fixed-clock now + TODO note, but please move it to the board
DTS. It's not the property of the SoC.

> 
>>> +     rtcclk: clock-rtcclk {> +               compatible = "fixed-clock";
>>> +             clock-output-names = "rtcclk";
>>> +             #clock-cells = <0>;
>>> +     };
>>> +


Best regards,
Krzysztof