linux-kernel - Re: [PATCH] clk: socfpga: remove redundant assignment after a mask operation

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Message-ID: <7f5f8143-3eae-424f-b857-b57f66c96f65@kernel.org>
Date:   Thu, 30 Dec 2021 12:10:40 -0600
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     Colin Ian King <colin.i.king@...il.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Nathan Chancellor <nathan@...nel.org>,
        Nick Desaulniers <ndesaulniers@...gle.com>,
        linux-clk@...r.kernel.org
Cc:     kernel-janitors@...r.kernel.org, llvm@...ts.linux.dev,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: socfpga: remove redundant assignment after a mask
 operation



On 12/30/21 9:03 AM, Colin Ian King wrote:
> The assignment operation after a & mask operation is redundant, the
> variables being assigned are not used afterwards. Replace the &=
> operator with just & operator.
> 
> Cleans up two clang-scan warnings:
> drivers/clk/socfpga/clk-gate.c:37:10: warning: Although the value stored
> to 'l4_src' is used in the enclosing expression, the value is never
> actually read from 'l4_src' [deadcode.DeadStores]
>                  return l4_src &= 0x1;
>                         ^         ~~~
> drivers/clk/socfpga/clk-gate.c:46:10: warning: Although the value stored
> to 'perpll_src' is used in the enclosing expression, the value is never
> actually read from 'perpll_src' [deadcode.DeadStores]
>                  return perpll_src &= 0x3;
> 
> Signed-off-by: Colin Ian King <colin.i.king@...il.com>
> ---
>   drivers/clk/socfpga/clk-gate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
> index 1ec9678d8cd3..53d6e3ec4309 100644
> --- a/drivers/clk/socfpga/clk-gate.c
> +++ b/drivers/clk/socfpga/clk-gate.c
> @@ -34,7 +34,7 @@ static u8 socfpga_clk_get_parent(struct clk_hw *hwclk)
>   
>   	if (streq(name, SOCFPGA_L4_MP_CLK)) {
>   		l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
> -		return l4_src &= 0x1;
> +		return l4_src & 0x1;
>   	}
>   	if (streq(name, SOCFPGA_L4_SP_CLK)) {
>   		l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
> @@ -43,7 +43,7 @@ static u8 socfpga_clk_get_parent(struct clk_hw *hwclk)
>   
>   	perpll_src = readl(clk_mgr_base_addr + CLKMGR_PERPLL_SRC);
>   	if (streq(name, SOCFPGA_MMC_CLK))
> -		return perpll_src &= 0x3;
> +		return perpll_src & 0x3;
>   	if (streq(name, SOCFPGA_NAND_CLK) ||
>   	    streq(name, SOCFPGA_NAND_X_CLK))
>   		return (perpll_src >> 2) & 3;
> 

Acked-by: Dinh Nguyen <dinguyen@...nel.org>