[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAHp75VeR4sL1URhf+Vj6_fUjw3wgG98nZd8Mu20NzH1zM590SQ@mail.gmail.com>
Date: Thu, 13 Jan 2022 12:24:41 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Wolfram Sang <wsa@...nel.org>, Terry Bowman <Terry.Bowman@....com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
Guenter Roeck <linux@...ck-us.net>,
Jean Delvare <jdelvare@...e.de>,
linux-i2c <linux-i2c@...r.kernel.org>,
linux-watchdog@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Tom Lendacky <thomas.lendacky@....com>,
Robert Richter <rrichter@....com>
Subject: Re: [PATCH] i2c: piix4: Replace piix4_smbus driver's cd6h/cd7h port
io accesses with mmio accesses
On Thu, Jan 13, 2022 at 9:42 AM Wolfram Sang <wsa@...nel.org> wrote:
>
>
> > > On top of that I'm wondering why slow I/O is used? Do we have anything
> > > that really needs that or is it simply a cargo-cult?
> >
> > The efch SMBUS & WDT previously only supported a port I/O interface
> > (until recently) and thus dictated the HW access method.
>
> Is this enough information to start v2 of this series? Or does the
> approach need more discussion?
I dunno why slow I/O is chosen, but it only affects design (read:
ugliness) of the new code.
--
With Best Regards,
Andy Shevchenko
Powered by blists - more mailing lists