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Message-ID: <CAE-0n53Y=GzBxbkbG=Vj+5gcrDreZYL1qMwnu4X1FdKJ78Ky-Q@mail.gmail.com>
Date: Thu, 13 Jan 2022 22:25:21 -0800
From: Stephen Boyd <swboyd@...omium.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>,
Douglas Anderson <dianders@...omium.org>
Cc: quic_rjendra@...cinc.com, sibis@...eaurora.org,
kgodara1@...eaurora.org, mka@...omium.org, pmaliset@...eaurora.org,
Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] arm64: dts: qcom: sc7280: Add herobrine-r1
Quoting Douglas Anderson (2022-01-13 16:43:03)
> Add the new herobrine-r1. Note that this is pretty much a re-design
> compared to herobrine-r0 so we don't attempt any dtsi to share stuff
> between them.
>
> This patch attempts to define things at 3 levels:
>
> 1. The Qcard level. Herobrine includes a Qcard PCB and the Qcard PCB
> is supposed to be the same (modulo stuffing options) across
> multiple boards, so trying to define what's there hopefully makes
> sense. NOTE that newer "CRD" boards from Qualcomm also use
> Qcard. When support for CRD3 is added hopefully it can use the
> Qcard include (and perhaps we should even evaluate it using
> herobrine.dtsi?)
> 2. The herobrine "baseboard" level. Right now most stuff is here with
> the exception of things that we _know_ will be different per
> board. We know that not all boards will have the same set of eMMC,
> nvme, and SD. We also know that the exact pin names are likely to
> be different.
> 3. The actual "board" level, AKA herobrine-rev1.
>
> NOTES:
> - This boots to command prompt, but no eDP yet since eDP hasn't
> been added to sc7280.dtsi yet.
> - This assumes LTE for now. Once it's clear how WiFi-only SKUs will
> work we expect some small changes.
>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
Reviewed-by: Stephen Boyd <swboyd@...omium.org>
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