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Message-ID: <ae307028-979b-7e58-dd6f-f1d52520859b@gmail.com>
Date: Fri, 14 Jan 2022 13:49:04 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Rob Herring <robh@...nel.org>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>
Cc: Enric Balletbo Serra <eballetbo@...il.com>,
Nicolas Boichat <drinkcat@...omium.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-mediatek@...ts.infradead.org,
srv_heupstream@...iatek.com,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [v1 1/2] dt-bindings: power: Add MT8186 power domains
On 12/01/2022 03:05, Rob Herring wrote:
> On Sat, Jan 08, 2022 at 09:19:52PM +0800, Chun-Jie Chen wrote:
>> Add power domains dt-bindings for MT8186.
>>
>> Signed-off-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
>> ---
>> .../power/mediatek,power-controller.yaml | 1 +
>> include/dt-bindings/power/mt8186-power.h | 32 +++++++++++++++++++
>> 2 files changed, 33 insertions(+)
>> create mode 100644 include/dt-bindings/power/mt8186-power.h
>>
>> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
>> index d6ebd77d28a7..135c6f722091 100644
>> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
>> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
>> @@ -26,6 +26,7 @@ properties:
>> - mediatek,mt8167-power-controller
>> - mediatek,mt8173-power-controller
>> - mediatek,mt8183-power-controller
>> + - mediatek,mt8186-power-controller
>> - mediatek,mt8192-power-controller
>> - mediatek,mt8195-power-controller
>>
>> diff --git a/include/dt-bindings/power/mt8186-power.h b/include/dt-bindings/power/mt8186-power.h
>> new file mode 100644
>> index 000000000000..ca8ea2d24801
>> --- /dev/null
>> +++ b/include/dt-bindings/power/mt8186-power.h
>> @@ -0,0 +1,32 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>
> Dual license please.
>
Other then that series looks good.
Regards,
Matthias
>> +/*
>> + * Copyright (c) 2022 MediaTek Inc.
>> + * Author: Chun-Jie Chen <chun-jie.chen@...iatek.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_POWER_MT8186_POWER_H
>> +#define _DT_BINDINGS_POWER_MT8186_POWER_H
>> +
>> +#define MT8186_POWER_DOMAIN_MFG0 0
>> +#define MT8186_POWER_DOMAIN_MFG1 1
>> +#define MT8186_POWER_DOMAIN_MFG2 2
>> +#define MT8186_POWER_DOMAIN_MFG3 3
>> +#define MT8186_POWER_DOMAIN_SSUSB 4
>> +#define MT8186_POWER_DOMAIN_SSUSB_P1 5
>> +#define MT8186_POWER_DOMAIN_DIS 6
>> +#define MT8186_POWER_DOMAIN_IMG 7
>> +#define MT8186_POWER_DOMAIN_IMG2 8
>> +#define MT8186_POWER_DOMAIN_IPE 9
>> +#define MT8186_POWER_DOMAIN_CAM 10
>> +#define MT8186_POWER_DOMAIN_CAM_RAWA 11
>> +#define MT8186_POWER_DOMAIN_CAM_RAWB 12
>> +#define MT8186_POWER_DOMAIN_VENC 13
>> +#define MT8186_POWER_DOMAIN_VDEC 14
>> +#define MT8186_POWER_DOMAIN_WPE 15
>> +#define MT8186_POWER_DOMAIN_CONN_ON 16
>> +#define MT8186_POWER_DOMAIN_CSIRX_TOP 17
>> +#define MT8186_POWER_DOMAIN_ADSP_AO 18
>> +#define MT8186_POWER_DOMAIN_ADSP_INFRA 19
>> +#define MT8186_POWER_DOMAIN_ADSP_TOP 20
>> +
>> +#endif /* _DT_BINDINGS_POWER_MT8186_POWER_H */
>> --
>> 2.18.0
>>
>>
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