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Message-ID: <mhng-c8a6625a-625b-420a-9399-f69d027a43ea@palmer-ri-x1c9>
Date: Fri, 21 Jan 2022 09:11:14 -0800 (PST)
From: Palmer Dabbelt <palmer@...osinc.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
CC: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Patches for the 5.17 Merge Window, Part 2
The following changes since commit f1b744f65e2f9682347c5faf6377e61e2ab19a67:
Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2022-01-19 11:38:21 +0200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.17-mw1
for you to fetch changes up to c59cd507fb640c2acc6b07cb60d7f765839e18c7:
RISC-V: nommu_virt: Drop unused SLAB_MERGE_DEFAULT (2022-01-20 12:48:14 -0800)
----------------------------------------------------------------
RISC-V Patches for the 5.17 Merge Window, Part 2
* Support for sv48 paging.
* Hart ID mappings are now sparse, which enables more CPUs to come up on
systems with sparse hart IDs.
* A handful of cleanups and fixes.
---
The sv48 patch set is a bit intrusive for something this late, but given that
it's being shown to fix some hangs it's seems better to take it now rather than
waiting.
I had no merge conflicts.
I'm not planning on submitting another PR for the merge window.
----------------------------------------------------------------
Alexandre Ghiti (9):
riscv: Get rid of MAXPHYSMEM configs
riscv: Move KASAN mapping next to the kernel mapping
riscv: Split early kasan mapping to prepare sv48 introduction
riscv: Introduce functions to switch pt_ops
riscv: Allow to dynamically define VA_BITS
asm-generic: Prepare for riscv use of pud_alloc_one and pud_free
riscv: Implement sv48 support
riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfo
riscv: Explicit comment about user virtual address space size
Atish Patra (6):
RISC-V: Avoid using per cpu array for ordered booting
RISC-V: Do not print the SBI version during HSM extension boot print
RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method
RISC-V: Move the entire hart selection via lottery to SMP
RISC-V: Move spinwait booting method to its own config
RISC-V: Do not use cpumask data structure for hartid bitmap
Heinrich Schuchardt (1):
riscv: default to CONFIG_RISCV_SBI_V01=n
Jisheng Zhang (6):
riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP"
riscv: mm: init: try best to use IS_ENABLED(CONFIG_64BIT) instead of #ifdef
riscv: mm: init: remove _pt_ops and use pt_ops directly
riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead of #ifdef
riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERNEL usage
riscv: bpf: Fix eBPF's exception tables
Lukas Bulwahn (1):
riscv: canaan: remove useless select of non-existing config SYSCON
Minghao Chi (1):
RISC-V: Remove redundant err variable
Palmer Dabbelt (2):
RISC-V: Introduce sv48 support without relocatable kernel
RISC-V: nommu_virt: Drop unused SLAB_MERGE_DEFAULT
Ron Economos (1):
riscv: dts: sifive unmatched: Add gpio poweroff
kernel test robot (1):
riscv: fix boolconv.cocci warnings
Documentation/riscv/vm-layout.rst | 12 +-
arch/riscv/Kconfig | 52 +--
.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 +
arch/riscv/configs/nommu_k210_defconfig | 1 -
arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
arch/riscv/configs/nommu_virt_defconfig | 2 -
arch/riscv/include/asm/cpu_ops.h | 2 -
arch/riscv/include/asm/cpu_ops_sbi.h | 25 ++
arch/riscv/include/asm/csr.h | 3 +-
arch/riscv/include/asm/fixmap.h | 1 +
arch/riscv/include/asm/kasan.h | 11 +-
arch/riscv/include/asm/page.h | 16 +-
arch/riscv/include/asm/pgalloc.h | 40 +++
arch/riscv/include/asm/pgtable-64.h | 108 +++++-
arch/riscv/include/asm/pgtable.h | 65 +++-
arch/riscv/include/asm/sbi.h | 19 +-
arch/riscv/include/asm/smp.h | 2 -
arch/riscv/include/asm/sparsemem.h | 6 +-
arch/riscv/kernel/Makefile | 3 +-
arch/riscv/kernel/asm-offsets.c | 3 +
arch/riscv/kernel/cpu.c | 23 +-
arch/riscv/kernel/cpu_ops.c | 26 +-
arch/riscv/kernel/cpu_ops_sbi.c | 26 +-
arch/riscv/kernel/cpu_ops_spinwait.c | 27 +-
arch/riscv/kernel/head.S | 38 ++-
arch/riscv/kernel/head.h | 6 +-
arch/riscv/kernel/ptrace.c | 4 +-
arch/riscv/kernel/sbi.c | 189 ++++++-----
arch/riscv/kernel/setup.c | 10 -
arch/riscv/kernel/smpboot.c | 2 +-
arch/riscv/kvm/mmu.c | 4 +-
arch/riscv/kvm/vcpu_sbi_replace.c | 11 +-
arch/riscv/kvm/vcpu_sbi_v01.c | 11 +-
arch/riscv/kvm/vmid.c | 4 +-
arch/riscv/mm/cacheflush.c | 5 +-
arch/riscv/mm/context.c | 4 +-
arch/riscv/mm/init.c | 378 +++++++++++++++------
arch/riscv/mm/kasan_init.c | 248 ++++++++++----
arch/riscv/mm/tlbflush.c | 9 +-
arch/riscv/net/bpf_jit_comp64.c | 2 +-
drivers/firmware/efi/libstub/efi-stub.c | 2 +
drivers/soc/canaan/Kconfig | 1 -
include/asm-generic/pgalloc.h | 24 +-
43 files changed, 1006 insertions(+), 425 deletions(-)
create mode 100644 arch/riscv/include/asm/cpu_ops_sbi.h
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