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Message-ID: <CALqkrRWD53MsHUYTDQ9+BiSD27uYUGNtU6pPeD3yiUwtJy2_jA@mail.gmail.com>
Date:   Tue, 25 Jan 2022 00:50:12 -0800
From:   Ayush Ranjan <ayushranjan@...gle.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ben Gardon <bgardon@...gle.com>,
        Jim Mattson <jmattson@...gle.com>,
        Andrei Vagin <avagin@...il.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Michael Davidson <md@...gle.com>
Subject: Re: [PATCH] gvisor: add some missing definitions to vmx.h

Abandoning this patch in favor of the more complete series of work quoted above.

On Mon, Jan 24, 2022 at 9:04 AM Sean Christopherson <seanjc@...gle.com> wrote:
>
> On Mon, Jan 24, 2022, Paolo Bonzini wrote:
> > On 1/23/22 20:53, Ayush Ranjan wrote:
> > > From: Michael Davidson <md@...gle.com>
> > >
> > > gvisor needs definitions for some additional secondary exec controls.
> > >
> > > Tested: builds
> > > Signed-off-by: Ayush Ranjan <ayushranjan@...gle.com>
> > > Signed-off-by: Michael Davidson <md@...gle.com>
> >
> > Incorrect order of the Signed-off-by header (author goes first, submitter
> > goes last).
> >
> > > ---
> > >   arch/x86/include/asm/vmx.h | 1 +
> > >   1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> > > index c77ad687cdf7..df40dc568eb9 100644
> > > --- a/arch/x86/include/asm/vmx.h
> > > +++ b/arch/x86/include/asm/vmx.h
> > > @@ -67,6 +67,7 @@
> > >   #define SECONDARY_EXEC_ENCLS_EXITING              VMCS_CONTROL_BIT(ENCLS_EXITING)
> > >   #define SECONDARY_EXEC_RDSEED_EXITING             VMCS_CONTROL_BIT(RDSEED_EXITING)
> > >   #define SECONDARY_EXEC_ENABLE_PML               VMCS_CONTROL_BIT(PAGE_MOD_LOGGING)
> > > +#define SECONDARY_EXEC_EPT_VE                      VMCS_CONTROL_BIT(EPT_VIOLATION_VE)
> > >   #define SECONDARY_EXEC_PT_CONCEAL_VMX             VMCS_CONTROL_BIT(PT_CONCEAL_VMX)
> > >   #define SECONDARY_EXEC_XSAVES                     VMCS_CONTROL_BIT(XSAVES)
> > >   #define SECONDARY_EXEC_MODE_BASED_EPT_EXEC        VMCS_CONTROL_BIT(MODE_BASED_EPT_EXEC)
> >
> > I'm not sure why gvisor would care about an internal Linux header. gvisor
> > should only use arch/x86/include/uapi headers.
>
> It's Google-internal kernel crud, this patch should not be merged.  Though with a
> bit of patience, an equivalent patch will come with TDX support.  If we do merge
> something before TDX, I'd strongly prefer to take that "complete" version with a
> rewritten changelog.
>
> [*] https://lore.kernel.org/all/e519d6ae1e75a4bea494bb3940e1272e935ead18.1625186503.git.isaku.yamahata@intel.com

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