[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMdYzYrKq==Bs0aonrJBC+W2c4nQ8cUn2dn_Se4WDaRCkT6SYg@mail.gmail.com>
Date: Thu, 27 Jan 2022 04:55:13 -0500
From: Peter Geis <pgwipeout@...il.com>
To: Johan Jonker <jbx6244@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
devicetree <devicetree@...r.kernel.org>,
arm-mail-list <linux-arm-kernel@...ts.infradead.org>,
"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] arm64: dts: rockchip: add Quartz64-A sdmmc1 node
On Thu, Jan 27, 2022 at 1:18 AM Johan Jonker <jbx6244@...il.com> wrote:
>
>
>
> On 1/27/22 02:00, Peter Geis wrote:
> > The sdmmc1 node on Quartz64-A supports the optional wifi module from
> > Pine64.
> > Add the sdmmc1 node and requisite sdio_pwrseq to enable wifi support on
> > the Quartz64-A.
> >
> > Signed-off-by: Peter Geis <pgwipeout@...il.com>
> > ---
> > .../boot/dts/rockchip/rk3566-quartz64-a.dts | 45 +++++++++++++++++++
> > 1 file changed, 45 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > index 33c2c18caaa9..1d73ac6557c5 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > @@ -91,6 +91,18 @@ simple-audio-card,codec {
> > };
> > };
> >
> > + sdio_pwrseq: sdio-pwrseq {
>
> > + status = "okay";
>
> When a node is not previously disabled, then there's no need for "okay".
Thanks, this is here in case an end user wants to easily hack the
board to use this for other purposes.
>
> > + compatible = "mmc-pwrseq-simple";
> > + clocks = <&rk817 1>;
> > + clock-names = "ext_clock";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&wifi_enable_h>;
> > + reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
> > + post-power-on-delay-ms = <100>;
> > + power-off-delay-us = <5000000>;
> > + };
> > +
> > vcc12v_dcin: vcc12v_dcin {
> > compatible = "regulator-fixed";
> > regulator-name = "vcc12v_dcin";
> > @@ -147,6 +159,17 @@ vcc_sys: vcc_sys {
> > regulator-max-microvolt = <4400000>;
> > vin-supply = <&vbus>;
> > };
> > +
> > + /* sourced from vcc_sys, sdio module operates internally at 3.3v */
> > + vcc_wl: vcc_wl {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_wl";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + vin-supply = <&vcc_sys>;
> > + };
> > };
> >
> > &cpu0 {
> > @@ -475,6 +498,12 @@ pmic_int_l: pmic-int-l {
> > };
> > };
> >
> > + sdio-pwrseq {
> > + wifi_enable_h: wifi-enable-h {
> > + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> > + };
> > + };
> > +
> > vcc_sd {
> > vcc_sd_h: vcc-sd-h {
> > rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
> > @@ -516,6 +545,22 @@ &sdmmc0 {
> > status = "okay";
> > };
> >
> > +&sdmmc1 {
> > + bus-width = <4>;
> > + cap-sd-highspeed;
> > + cap-sdio-irq;
>
> > + disable-wp;
>
> From mmc-controller.yaml:
>
> disable-wp:
> $ref: /schemas/types.yaml#/definitions/flag
> description:
> When set, no physical write-protect line is present. This
> property should only be specified when the controller has a
> dedicated write-protect detection logic. If a GPIO is always used
> for the write-protect detection logic, it is sufficient to not
> specify the wp-gpios property in the absence of a write-protect
> line. Not used in combination with eMMC or SDIO.
Appreciate it, I will drop this.
>
> > + keep-power-in-suspend;
> > + mmc-pwrseq = <&sdio_pwrseq>;
> > + non-removable;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
> > + sd-uhs-sdr104;
> > + vmmc-supply = <&vcc_wl>;
> > + vqmmc-supply = <&vcc_1v8>;
> > + status = "okay";
> > +};
> > +
> > &spdif {
> > status = "okay";
> > };
Powered by blists - more mailing lists