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Message-ID: <YfQlIamPBML0JaET@lunn.ch>
Date: Fri, 28 Jan 2022 18:17:21 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Tobias Waldekranz <tobias@...dekranz.com>
Cc: davem@...emloft.net, kuba@...nel.org, netdev@...r.kernel.org,
David.Laight@...lab.com, Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 net-next 1/2] net: dsa: mv88e6xxx: Improve performance
of busy bit polling
On Fri, Jan 28, 2022 at 05:26:49PM +0100, Tobias Waldekranz wrote:
> Avoid a long delay when a busy bit is still set and has to be polled
> again.
>
> Measurements on a system with 2 Opals (6097F) and one Agate (6352)
> show that even with this much tighter loop, we have about a 50% chance
> of the bit being cleared on the first poll, all other accesses see the
> bit being cleared on the second poll.
>
> On a standard MDIO bus running MDC at 2.5MHz, a single access with 32
> bits of preamble plus 32 bits of data takes 64*(1/2.5MHz) = 25.6us.
>
> This means that mv88e6xxx_smi_direct_wait took 26us + CPU overhead in
> the fast scenario, but 26us + 1500us + 26us + CPU overhead in the slow
> case - bringing the average close to 1ms.
>
> With this change in place, the slow case is closer to 2*26us + CPU
> overhead, with the average well below 100us - a 10x improvement.
>
> This translates to real-world winnings. On a 3-chip 20-port system,
> the modprobe time drops by 88%:
>
> Before:
>
> root@...onet:~# time modprobe mv88e6xxx
> real 0m 15.99s
> user 0m 0.00s
> sys 0m 1.52s
>
> After:
>
> root@...onet:~# time modprobe mv88e6xxx
> real 0m 2.21s
> user 0m 0.00s
> sys 0m 1.54s
>
> Signed-off-by: Tobias Waldekranz <tobias@...dekranz.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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