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Message-Id: <20220130135634.1213301-1-guoren@kernel.org>
Date: Sun, 30 Jan 2022 21:56:32 +0800
From: guoren@...nel.org
To: guoren@...nel.org, anup@...infault.org, maz@...nel.org,
tglx@...utronix.de, palmer@...belt.com, samuel@...lland.org
Cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: [PATCH V7 0/2] Add thead,c900-plic support
From: Guo Ren <guoren@...ux.alibaba.com>
Add the compatible string "thead,c900-plic" to the riscv plic
bindings to support allwinner d1 SOC which contains c906 core.
Changes since V7:
- Remove /proc/interrupts display part modification
Changes since V6:
- Modify sifive,plic-1.0.0.yaml comment
- Remove vendor-prefixes patch which has been merged
- Only put dt naming distinguish in sifive-plic.c
Changes since V5:
- Move back to mask/unmask
- Fixup the problem in eoi callback
- Remove allwinner,sun20i-d1 IRQCHIP_DECLARE
- Rewrite comment log
- Add DT list
- Fixup compatible string
- Remove allwinner-d1 compatible
- make dt_binding_check
- Add T-head vendor-prefixes
Changes since V4:
- Update description in errata style
- Update enum suggested by Anup, Heiko, Samuel
- Update comment by Anup
- Add cover-letter
Changes since V3:
- Rename "c9xx" to "c900"
- Add thead,c900-plic in the description section
- Add sifive_plic_chip and thead_plic_chip for difference
Changes since V2:
- Add a separate compatible string "thead,c9xx-plic"
- set irq_mask/unmask of "plic_chip" to NULL and point
irq_enable/disable of "plic_chip" to plic_irq_mask/unmask
- Add a detailed comment block in plic_init() about the
differences in Claim/Completion process of RISC-V PLIC and C9xx
PLIC.
Guo Ren (2):
dt-bindings: update riscv plic compatible string
irqchip/sifive-plic: Fixup thead,c900-plic DT parse missing
.../sifive,plic-1.0.0.yaml | 21 +++++++++++++------
drivers/irqchip/irq-sifive-plic.c | 1 +
2 files changed, 16 insertions(+), 6 deletions(-)
--
2.25.1
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