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Message-Id: <164369277343.3095904.13862409515453016955.b4-ty@linaro.org>
Date:   Mon, 31 Jan 2022 23:20:01 -0600
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Rob Herring <robh@...nel.org>, Andy Gross <agross@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: (subset) [PATCH] arm64: dts: qcom: Fix msm8998 cache nodes

On Fri, 17 Dec 2021 15:11:36 -0600, Rob Herring wrote:
> The msm8998 cache nodes have some issues. First, L1 caches are described
> within cpu nodes, not as separate nodes. The 'next-level-cache' property
> is of course in the correct location, otherwise the cache hierarchy
> walking would not work. Remove all the L1 cache nodes.
> 
> Second, 'arm,arch-cache' is not a documented compatible string. "cache"
> is a sufficient compatible string for the Arm architected caches.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: Fix msm8998 cache nodes
      commit: fad35efa75a22050bb4b7cace8c1c9dd4fc70d16

Best regards,
-- 
Bjorn Andersson <bjorn.andersson@...aro.org>

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