linux-kernel - Re: [PATCH 02/17] ARM: dts: qcom: add gsbi6 missing definition for ipq8064

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <YflFx91iRey7N4uv@earth.li>
Date:   Tue, 1 Feb 2022 14:37:59 +0000
From:   Jonathan McDowell <noodles@...th.li>
To:     Ansuel Smith <ansuelsmth@...il.com>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 02/17] ARM: dts: qcom: add gsbi6 missing definition for
 ipq8064

On Tue, Jan 18, 2022 at 02:20:32AM +0100, Ansuel Smith wrote:
> Add gsbi6 missing definition for ipq8064.
> 
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index cc6ca9013ab1..094125605bea 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -665,6 +665,33 @@ spi@...80000 {
>  			};
>  		};
>  
> +		gsbi6: gsbi@...00000 {
> +			status = "disabled";
> +			compatible = "qcom,gsbi-v1.0.0";
> +			cell-index = <6>;
> +			reg = <0x16500000 0x100>;
> +			clocks = <&gcc GSBI6_H_CLK>;
> +			clock-names = "iface";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			syscon-tcsr = <&tcsr>;
> +
> +			gsbi6_i2c: i2c@...80000 {
> +				compatible = "qcom,i2c-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";
> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};

Can you include the SPI definition too? The RB3011 has its SPI LCD
living here.

		gsbi6_spi: spi@...80000 {
			compatible = "qcom,spi-qup-v1.1.1";
			reg = <0x16580000 0x1000>;
			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
			clock-names = "core", "iface";
			status = "disabled";

			#address-cells = <1>;
			#size-cells = <0>;
		};

> +		};
> +
>  		gsbi7: gsbi@...00000 {
>  			status = "disabled";
>  			compatible = "qcom,gsbi-v1.0.0";
> -- 
> 2.33.1
> 

J.

-- 
] https://www.earth.li/~noodles/ []  "send me the rhubarb" -- Martin   [
]  PGP/GPG Key @ the.earth.li    [] Brooks on the risks of dog poo in  [
] via keyserver, web or email.   []              compost               [
] RSA: 4096/0x94FA372B2DA8B985   []                                    [