lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220207132444.3653-1-clin@suse.com>
Date:   Mon,  7 Feb 2022 21:24:41 +0800
From:   Chester Lin <clin@...e.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Andreas Färber <afaerber@...e.de>,
        Matthias Brugger <mbrugger@...e.com>, s32@....com
CC:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Radu Nicolae Pirea <radu-nicolae.pirea@....nxp.com>,
        "Ivan T . Ivanov" <iivanov@...e.de>,
        "Lee, Chun-Yi" <jlee@...e.com>, Chester Lin <clin@...e.com>
Subject: [RFC PATCH 0/3] Add SCMI clk support for NXP S32G2

Hi folks,

Here I'd like to propose an upstream patchset to support clock management of
NXP S32G2 platforms based on ARM-SCMI's clock protocol (0x14). The goal is to
have simple clock settings for enabling limited functions, such as MMC and
GMAC0. Most of codes are mainly refined/refactored/redistributed from NXP's
downstream codebase on CodeAurora[1] under the original license announcements
and all SCMI clock IDs still match the implementations of NXP's downstream
TF-A[2].

For those downstream authors who implement the main/original ideas, please
forgive me that I only leave my name as "Signed-off-by" because I'm not sure
if you might agree with these changes. Please feel free to let me know if you
don't mind to be added into the list.

I roughly verified this patchset with NXP downstream firmware blobs [major ver:
bsp30 & bsp31], such as TF-A[2] and U-Boot[3] (BL33) on CodeAurora.

Thanks for your patience.

Chester

[1]: https://source.codeaurora.org/external/autobsps32/linux/
[2]: https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/
[3]: https://source.codeaurora.org/external/autobsps32/u-boot/

Chester Lin (3):
  dt-bindings: clock: Add s32g2 clock binding
  arm64: dts: s32g2: add SCMI support
  arm64: dts: s32g2: add USDHC support

 arch/arm64/boot/dts/freescale/s32g2.dtsi      | 40 +++++++++++++++++++
 .../arm64/boot/dts/freescale/s32g274a-evb.dts |  4 ++
 .../boot/dts/freescale/s32g274a-rdb2.dts      |  4 ++
 include/dt-bindings/clock/s32g2-clock.h       | 28 +++++++++++++
 4 files changed, 76 insertions(+)
 create mode 100644 include/dt-bindings/clock/s32g2-clock.h

-- 
2.33.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ