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Message-ID: <CAJF2gTSki27uum+vPEsU50ktuBmkFC=XSr_KuAmKG2pwX2OwtA@mail.gmail.com>
Date: Mon, 7 Feb 2022 17:13:14 +0800
From: Guo Ren <guoren@...nel.org>
To: Marc Zyngier <maz@...nel.org>
Cc: Anup Patel <anup@...infault.org>,
Thomas Gleixner <tglx@...utronix.de>,
Palmer Dabbelt <palmer@...belt.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
devicetree <devicetree@...r.kernel.org>,
Guo Ren <guoren@...ux.alibaba.com>,
Samuel Holland <samuel@...lland.org>
Subject: Re: [PATCH V7 2/2] irqchip/sifive-plic: Fixup thead,c900-plic DT
parse missing
Hi Marc,
On Wed, Feb 2, 2022 at 12:42 PM Samuel Holland <samuel@...lland.org> wrote:
>
> On 1/30/22 7:56 AM, guoren@...nel.org wrote:
> > From: Guo Ren <guoren@...ux.alibaba.com>
> >
> > The thead,c900-plic has been used in opensbi to distinguish
> > PLIC [1]. Although PLICs have the same behaviors in Linux,
> > they are different hardware with some custom initializing in
> > firmware(opensbi).
> >
> > Qute opensbi patch commit-msg by Samuel:
> >
> > The T-HEAD PLIC implementation requires setting a delegation bit
> > to allow access from S-mode. Now that the T-HEAD PLIC has its own
> > compatible string, set this bit automatically from the PLIC driver,
> > instead of reaching into the PLIC's MMIO space from another driver.
> >
> > [1]: https://github.com/riscv-software-src/opensbi/commit/78c2b19218bd62653b9fb31623a42ced45f38ea6
> >
> > Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> > Cc: Anup Patel <anup@...infault.org>
> > Cc: Marc Zyngier <maz@...nel.org>
> > Cc: Palmer Dabbelt <palmer@...belt.com>
> > Cc: Samuel Holland <samuel@...lland.org>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > ---
> > drivers/irqchip/irq-sifive-plic.c | 1 +
> > 1 file changed, 1 insertion(+)
>
> Tested-by: Samuel Holland <samuel@...lland.org>
ping... gently. Any problem with the above patch?
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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