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Message-ID: <20220208171941.18156714@endymion.delvare>
Date: Tue, 8 Feb 2022 17:19:41 +0100
From: Jean Delvare <jdelvare@...e.de>
To: Terry Bowman <terry.bowman@....com>
Cc: <linux@...ck-us.net>, <linux-watchdog@...r.kernel.org>,
<linux-i2c@...r.kernel.org>, <wsa@...nel.org>,
<andy.shevchenko@...il.com>, <rafael.j.wysocki@...el.com>,
<linux-kernel@...r.kernel.org>, <wim@...ux-watchdog.org>,
<rrichter@....com>, <thomas.lendacky@....com>,
<sudheesh.mavila@....com>, <Nehal-bakulchandra.Shah@....com>,
<Basavaraj.Natikar@....com>, <Shyam-sundar.S-k@....com>,
<Mario.Limonciello@....com>
Subject: Re: [PATCH v4 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port
select
Hi Terry,
On Sun, 30 Jan 2022 12:41:29 -0600, Terry Bowman wrote:
> AMD processors include registers capable of selecting between 2 SMBus
> ports. Port selection is made during each user access by writing to
> FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
> SMBus port selection because cd6h/cd7h port I/O is not available on
> later AMD processors.
>
> Signed-off-by: Terry Bowman <terry.bowman@....com>
> ---
> drivers/i2c/busses/i2c-piix4.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> (...)
> @@ -765,6 +774,7 @@ static int piix4_sb800_port_sel(u8 port)
>
> return (smba_en_lo & piix4_port_mask_sb800);
> }
> +
> /*
> * Handles access to multiple SMBus ports on the SB800.
> * The port is selected by bits 2:1 of the smb_en register (0x2c).
We indeed want a blank line here, but it should be inserted in patch
[5/9] (which adds function piix4_sb800_port_sel), not in this patch.
--
Jean Delvare
SUSE L3 Support
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