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Date: Tue, 8 Feb 2022 10:38:20 +0000 From: Bharat Kumar Gogada <bharatku@...inx.com> To: Bjorn Helgaas <helgaas@...nel.org> CC: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>, "bhelgaas@...gle.com" <bhelgaas@...gle.com>, Michal Simek <michals@...inx.com> Subject: RE: [PATCH 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root Port driver > Subject: Re: [PATCH 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root > Port driver > > In subject, possibly: > > PCI: xilinx-cpm: Add Versal CPM5 Root Port support > > since you're adding support for a *device*, not for a *driver*. > > On Mon, Feb 07, 2022 at 09:42:50AM +0530, Bharat Kumar Gogada wrote: > > Xilinx Versal Premium series has CPM5 block which supports Root port > > functioning at Gen5 speed. > > Xilinx Versal CPM5 has few changes with existing CPM block. > > - CPM5 has dedicated register space for control and status registers. > > - CPM5 legacy interrupt handling needs additional register bit > > to enable and handle legacy interrupts. > > s/Root port/Root Port/ to be consistent. > Add blank line between paragraphs. > Thanks Bjorn, will do the changes in next patch. Regards, Bharat
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