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Message-ID: <144329a3-8125-1975-7f23-a247343a679e@huawei.com>
Date:   Tue, 8 Feb 2022 11:56:48 +0000
From:   John Garry <john.garry@...wei.com>
To:     Yicong Yang <yangyicong@...wei.com>,
        Yicong Yang <yangyicong@...ilicon.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "helgaas@...nel.org" <helgaas@...nel.org>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "will@...nel.org" <will@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "mathieu.poirier@...aro.org" <mathieu.poirier@...aro.org>,
        "suzuki.poulose@....com" <suzuki.poulose@....com>,
        "mike.leach@...aro.org" <mike.leach@...aro.org>,
        "leo.yan@...aro.org" <leo.yan@...aro.org>,
        "Jonathan Cameron" <jonathan.cameron@...wei.com>,
        "daniel.thompson@...aro.org" <daniel.thompson@...aro.org>,
        "joro@...tes.org" <joro@...tes.org>,
        "Shameerali Kolothum Thodi" <shameerali.kolothum.thodi@...wei.com>,
        "robin.murphy@....com" <robin.murphy@....com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "coresight@...ts.linaro.org" <coresight@...ts.linaro.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>
CC:     "Zengtao (B)" <prime.zeng@...ilicon.com>,
        "liuqi (BA)" <liuqi115@...wei.com>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        Linuxarm <linuxarm@...wei.com>,
        "Song Bao Hua (Barry Song)" <song.bao.hua@...ilicon.com>
Subject: Re: [PATCH v3 8/8] iommu/arm-smmu-v3: Make default domain type of
 HiSilicon PTT device to identity

On 08/02/2022 11:21, Yicong Yang wrote:
>> This patch should be earlier in the series, before the PTT driver, and the comment on hisi_ptt_check_iommu_mapping() should mention what is going on here.
>>
> ok I'll reorder the serives and modify the comments of hisi_ptt_check_iommu_mapping() like:
> 
> /*
>   * The DMA of PTT trace can only use direct mapping, due to some
>   * hardware restriction. Check whether there is an iommu or the
>   * policy of the iommu domain is passthrough, otherwise the trace
>   * cannot work.

IOMMU, capitalize acronyms

>   *
>   * The PTT device is supposed to behind the arm smmu v3, which
>   * should have passthrough the device by a quirk. Otherwise user
>   * should manually set the iommu domain type to identity through
>   * sysfs.

Sorry, but I don't really understand your meaning here.

I did not think that if we have a default domain then we can change via 
sysfs to anything else.

>   */
> 
>>> Signed-off-by: Yicong Yang<yangyicong@...ilicon.com>
>>> ---
>>>    drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++++
>>>    1 file changed, 16 insertions(+)
>>>
>>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> index 6dc6d8b6b368..6f67a2b1dd27 100644
>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> @@ -2838,6 +2838,21 @@ static int arm_smmu_dev_disable_feature(struct device *dev,
>>>        }
>>>    }
>>>    +#define IS_HISI_PTT_DEVICE(pdev)    ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \
>>> +                     (pdev)->device == 0xa12e)
>> I assume that not all revisions will require this check, right?

So if you are very confident that the next revision will be fixed then I 
would add a check for this current broken revision.

>>
> For current revisions it's necessary.
> 

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