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Message-Id: <1644395754-3698-1-git-send-email-wangqing@vivo.com>
Date: Wed, 9 Feb 2022 00:35:53 -0800
From: Qing Wang <wangqing@...o.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Wang Qing <wangqing@...o.com>
Subject: [PATCH] clk: hisilicon: use div64_u64() instead of do_div()
From: Wang Qing <wangqing@...o.com>
do_div() does a 64-by-32 division.
When the divisor is u64, do_div() truncates it to 32 bits, this means it
can test non-zero and be truncated to zero for division.
fix do_div.cocci warning:
do_div() does a 64-by-32 division, please consider using div64_u64 instead.
Signed-off-by: Wang Qing <wangqing@...o.com>
---
drivers/clk/hisilicon/clk-hi3559a.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
index 56012a3d..8e90598
--- a/drivers/clk/hisilicon/clk-hi3559a.c
+++ b/drivers/clk/hisilicon/clk-hi3559a.c
@@ -441,8 +441,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
rate = 0;
tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);
rate += tmp;
- do_div(rate, refdiv_val);
- do_div(rate, postdiv1_val * postdiv2_val);
+ div64_u64(rate, refdiv_val);
+ div64_u64(rate, postdiv1_val * postdiv2_val);
return rate;
}
--
2.7.4
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