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Message-Id: <1644395739-3640-1-git-send-email-wangqing@vivo.com>
Date: Wed, 9 Feb 2022 00:35:39 -0800
From: Qing Wang <wangqing@...o.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Wang Qing <wangqing@...o.com>
Subject: [PATCH] clk: xgene: use div64_u64() instead of do_div()
From: Wang Qing <wangqing@...o.com>
do_div() does a 64-by-32 division.
When the divisor is u64, do_div() truncates it to 32 bits, this means it
can test non-zero and be truncated to zero for division.
fix do_div.cocci warning:
do_div() does a 64-by-32 division, please consider using div64_u64 instead.
Signed-off-by: Wang Qing <wangqing@...o.com>
---
drivers/clk/clk-xgene.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index 857217c..6c40821
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -262,7 +262,7 @@ static unsigned long xgene_clk_pmd_recalc_rate(struct clk_hw *hw,
scale++;
/* freq = parent_rate * scaler / denom */
- do_div(ret, fd->denom);
+ div64_u64(ret, fd->denom);
ret *= scale;
if (ret == 0)
ret = (u64)parent_rate;
@@ -284,7 +284,7 @@ static long xgene_clk_pmd_round_rate(struct clk_hw *hw, unsigned long rate,
scale = DIV_ROUND_UP_ULL(ret, *parent_rate);
ret = (u64)*parent_rate * scale;
- do_div(ret, fd->denom);
+ div64_u64(ret, fd->denom);
return ret;
}
--
2.7.4
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