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Message-ID: <38e537baa8153bbdc6963addf349570ae8189133.camel@mediatek.com>
Date:   Tue, 15 Feb 2022 14:33:26 +0800
From:   Chun-Jie Chen <chun-jie.chen@...iatek.com>
To:     Chen-Yu Tsai <wenst@...omium.org>, Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Miles Chen <miles.chen@...iatek.com>,
        <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 13/31] clk: mediatek: pll: Implement unregister API

On Tue, 2022-02-08 at 20:40 +0800, Chen-Yu Tsai wrote:
> The PLL clk type within the MediaTek clk driver library only has a
> register function, and no corresponding unregister function. This
> means there is no way for its users to properly implement cleanup
> and removal.
> 
> Add a matching unregister function for the PLL type clk.
> 
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: Miles Chen <miles.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>

Reviewed-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> ---
>  drivers/clk/mediatek/clk-pll.c | 55
> ++++++++++++++++++++++++++++++++++
>  drivers/clk/mediatek/clk-pll.h |  2 ++
>  2 files changed, 57 insertions(+)
> 
> diff --git a/drivers/clk/mediatek/clk-pll.c
> b/drivers/clk/mediatek/clk-pll.c
> index 64f59554bc9b..b54e33b75d4e 100644
> --- a/drivers/clk/mediatek/clk-pll.c
> +++ b/drivers/clk/mediatek/clk-pll.c
> @@ -360,6 +360,21 @@ static struct clk *mtk_clk_register_pll(const
> struct mtk_pll_data *data,
>  	return clk;
>  }
>  
> +static void mtk_clk_unregister_pll(struct clk *clk)
> +{
> +	struct clk_hw *hw;
> +	struct mtk_clk_pll *pll;
> +
> +	hw = __clk_get_hw(clk);
> +	if (!hw)
> +		return;
> +
> +	pll = to_mtk_clk_pll(hw);
> +
> +	clk_unregister(clk);
> +	kfree(pll);
> +}
> +
>  void mtk_clk_register_plls(struct device_node *node,
>  		const struct mtk_pll_data *plls, int num_plls, struct
> clk_onecell_data *clk_data)
>  {
> @@ -388,4 +403,44 @@ void mtk_clk_register_plls(struct device_node
> *node,
>  }
>  EXPORT_SYMBOL_GPL(mtk_clk_register_plls);
>  
> +static __iomem void *mtk_clk_pll_get_base(struct clk *clk,
> +					  const struct mtk_pll_data
> *data)
> +{
> +	struct clk_hw *hw = __clk_get_hw(clk);
> +	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);
> +
> +	return pll->base_addr - data->reg;
> +}
> +
> +void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int
> num_plls,
> +			     struct clk_onecell_data *clk_data)
> +{
> +	__iomem void *base = NULL;
> +	int i;
> +
> +	if (!clk_data)
> +		return;
> +
> +	for (i = num_plls; i > 0; i--) {
> +		const struct mtk_pll_data *pll = &plls[i - 1];
> +
> +		if (IS_ERR_OR_NULL(clk_data->clks[pll->id]))
> +			continue;
> +
> +		/*
> +		 * This is quite ugly but unfortunately the clks don't
> have
> +		 * any device tied to them, so there's no place to
> store the
> +		 * pointer to the I/O region base address. We have to
> fetch
> +		 * it from one of the registered clks.
> +		 */
> +		base = mtk_clk_pll_get_base(clk_data->clks[pll->id],
> pll);
> +
> +		mtk_clk_unregister_pll(clk_data->clks[pll->id]);
> +		clk_data->clks[pll->id] = ERR_PTR(-ENOENT);
> +	}
> +
> +	iounmap(base);
> +}
> +EXPORT_SYMBOL_GPL(mtk_clk_unregister_plls);
> +
>  MODULE_LICENSE("GPL");
> diff --git a/drivers/clk/mediatek/clk-pll.h
> b/drivers/clk/mediatek/clk-pll.h
> index d01b0c38311d..a889b1e472e7 100644
> --- a/drivers/clk/mediatek/clk-pll.h
> +++ b/drivers/clk/mediatek/clk-pll.h
> @@ -51,5 +51,7 @@ struct mtk_pll_data {
>  void mtk_clk_register_plls(struct device_node *node,
>  			   const struct mtk_pll_data *plls, int
> num_plls,
>  			   struct clk_onecell_data *clk_data);
> +void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int
> num_plls,
> +			     struct clk_onecell_data *clk_data);
>  
>  #endif /* __DRV_CLK_MTK_PLL_H */

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