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Message-ID: <81e8440bea87ef2b03b04ca135da4df0fdaef2de.camel@mediatek.com>
Date: Tue, 15 Feb 2022 14:34:06 +0800
From: Chun-Jie Chen <chun-jie.chen@...iatek.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Matthias Brugger <matthias.bgg@...il.com>
CC: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Miles Chen <miles.chen@...iatek.com>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 14/31] clk: mediatek: pll: Clean up included headers
On Tue, 2022-02-08 at 20:40 +0800, Chen-Yu Tsai wrote:
> Some included headers aren't actually used anywhere, while other
> headers
> with the declaration of functions and structures aren't directly
> included.
>
> Get rid of the unused ones, and add the ones that should be included
> directly.
>
> Also, copy the MHZ macro from clk-mtk.h, and drop clk-mtk.h from the
> included headers.
>
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: Miles Chen <miles.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> ---
> drivers/clk/mediatek/clk-pll.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-pll.c
> b/drivers/clk/mediatek/clk-pll.c
> index b54e33b75d4e..8439d37e354d 100644
> --- a/drivers/clk/mediatek/clk-pll.c
> +++ b/drivers/clk/mediatek/clk-pll.c
> @@ -4,17 +4,19 @@
> * Author: James Liao <jamesjj.liao@...iatek.com>
> */
>
> -#include <linux/of.h>
> -#include <linux/of_address.h>
> +#include <linux/clk-provider.h>
> +#include <linux/container_of.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> #include <linux/io.h>
> #include <linux/module.h>
> +#include <linux/of_address.h>
> #include <linux/slab.h>
> -#include <linux/clkdev.h>
> -#include <linux/delay.h>
>
> -#include "clk-mtk.h"
> #include "clk-pll.h"
>
> +#define MHZ (1000 * 1000)
> +
> #define REG_CON0 0
> #define REG_CON1 4
>
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