linux-kernel - Re: [PATCH] KVM: x86/pmu: Fix reserved bits for AMD PerfEvtSeln register

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Message-ID: <dc14c98c-e35a-95c0-83dd-13b5f7cffc03@gmail.com>
Date:   Wed, 16 Feb 2022 15:47:33 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Jim Mattson <jmattson@...gle.com>,
        David Dunn <daviddunn@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Joerg Roedel <joro@...tes.org>,
        Kim Phillips <kim.phillips@....com>,
        Maxim Levitsky <mlevitsk@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] KVM: x86/pmu: Fix reserved bits for AMD PerfEvtSeln
 register

On 12/2/2022 4:39 pm, Jim Mattson wrote:
>> -       pmu->reserved_bits = 0xffffffff00200000ull;
>> +       pmu->reserved_bits = 0xfffffff000280000ull;
> Bits 40 and 41 are guest mode and host mode. They cannot be reserved
> if the guest supports nested SVM.
> 

Indeed, we need (some hands) to do more pmu tests on nested SVM.