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Date:   Fri, 18 Feb 2022 22:15:16 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Andrew Cooper <Andrew.Cooper3@...rix.com>
Cc:     "x86@...nel.org" <x86@...nel.org>,
        "joao@...rdrivepizza.com" <joao@...rdrivepizza.com>,
        "hjl.tools@...il.com" <hjl.tools@...il.com>,
        "jpoimboe@...hat.com" <jpoimboe@...hat.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "ndesaulniers@...gle.com" <ndesaulniers@...gle.com>,
        "keescook@...omium.org" <keescook@...omium.org>,
        "samitolvanen@...gle.com" <samitolvanen@...gle.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "alyssa.milburn@...el.com" <alyssa.milburn@...el.com>
Subject: Re: [PATCH 14/29] x86/ibt: Add IBT feature, MSR and #CP handling

On Fri, Feb 18, 2022 at 07:31:38PM +0000, Andrew Cooper wrote:
> On 18/02/2022 16:49, Peter Zijlstra wrote:
> > --- a/arch/x86/kernel/cpu/common.c
> > +++ b/arch/x86/kernel/cpu/common.c
> > @@ -592,6 +593,27 @@ static __init int setup_disable_pku(char
> >  __setup("nopku", setup_disable_pku);
> >  #endif /* CONFIG_X86_64 */
> >  
> > +static __always_inline void setup_cet(struct cpuinfo_x86 *c)
> > +{
> > +	u64 msr;
> > +
> > +	if (!IS_ENABLED(CONFIG_X86_IBT) ||
> > +	    !cpu_feature_enabled(X86_FEATURE_IBT))
> > +		return;
> > +
> > +	cr4_set_bits(X86_CR4_CET);
> > +
> > +	rdmsrl(MSR_IA32_S_CET, msr);
> > +	if (cpu_feature_enabled(X86_FEATURE_IBT))
> > +		msr |= CET_ENDBR_EN;
> > +	wrmsrl(MSR_IA32_S_CET, msr);
> 
> So something I learnt the hard way with shstk is that you really want to
> disable S_CET before heading into purgatory.
> 
> I've got no idea what's going to result from UEFI finally getting CET
> support.  However, clearing out the other IBT settings is probably a
> wise move.
> 
> In particular, if there was a stale legacy bitmap pointer, then
> ibt_selftest() could take #PF ahead of #CP.

How's this then? That writes the whole state to a known value before
enabling CR4.CET to make the thing go...

+static __always_inline void setup_cet(struct cpuinfo_x86 *c)
+{
+       u64 msr = CET_ENDBR_EN;
+
+       if (!IS_ENABLED(CONFIG_X86_IBT) ||
+           !cpu_feature_enabled(X86_FEATURE_IBT))
+               return;
+
+       wrmsrl(MSR_IA32_S_CET, msr);
+       cr4_set_bits(X86_CR4_CET);
+
+       if (!ibt_selftest()) {
+               pr_err("IBT selftest: Failed!\n");
+               setup_clear_cpu_cap(X86_FEATURE_IBT);
+       }
+}

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