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Message-ID: <3cd0fd16-2d59-d3ac-7a73-4209311b2b97@amd.com>
Date: Mon, 21 Feb 2022 09:46:18 -0600
From: Brijesh Singh <brijesh.singh@....com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...el.com, luto@...nel.org, peterz@...radead.org
Cc: brijesh.singh@....com, sathyanarayanan.kuppuswamy@...ux.intel.com,
aarcange@...hat.com, ak@...ux.intel.com, dan.j.williams@...el.com,
david@...hat.com, hpa@...or.com, jgross@...e.com,
jmattson@...gle.com, joro@...tes.org, jpoimboe@...hat.com,
knsathya@...nel.org, pbonzini@...hat.com, sdeep@...are.com,
seanjc@...gle.com, tony.luck@...el.com, vkuznets@...hat.com,
wanpengli@...cent.com, x86@...nel.org,
linux-kernel@...r.kernel.org,
Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [PATCHv3 27/32] x86/mm/cpa: Generailize
__set_memory_enc_pgtable()
On 2/18/22 10:17, Kirill A. Shutemov wrote:
...
>
> - /*
> - * Before changing the encryption attribute, we need to flush caches.
> - */
> - cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT));
> + /* Flush caches as needed before changing the encryption attribute. */
> + if (x86_platform.cc->enc_tlb_flush_required(enc))
> + cpa_flush(&cpa, x86_platform.cc->enc_cache_flush_required());
>
> ret = __change_page_attr_set_clr(&cpa, 1);
>
> @@ -2027,7 +2026,8 @@ static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
> * Notify hypervisor that a given memory range is mapped encrypted
> * or decrypted.
> */
> - notify_range_enc_status_changed(addr, numpages, enc);
> + if (!ret)
> + ret = x86_platform.cc->enc_status_changed(addr, numpages, enc);
>
Boris has given similar comment on SNP series. This area of code have a
very similar requirement. Boris proposed it here [1] and I followed up
[2] with SNP specific comment. It will be good to get your feedback and
do a generic implementation outside of the SNP/TDX series.
[1] https://lore.kernel.org/linux-mm/Ygz88uacbwuTTNat@zn.tnic/
[2]
https://lore.kernel.org/linux-mm/20220216160457.1748381-1-brijesh.singh@amd.com/T/
thanks
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