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Message-ID: <20220223175016.GA140091@bhelgaas>
Date: Wed, 23 Feb 2022 11:50:16 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, bhelgaas@...gle.com, broonie@...nel.org,
lorenzo.pieralisi@....com, jingoohan1@...il.com,
festevam@...il.com, francesco.dolcini@...adex.com,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...gutronix.de,
linux-imx@....com
Subject: Re: [PATCH v7 7/8] PCI: imx6: Disable enabled clocks and regulators
after link is down
In subject,
s/Disable enabled clocks/Disable clocks/
On Wed, Feb 16, 2022 at 02:21:02PM +0800, Richard Zhu wrote:
> Since i.MX PCIe doesn't support the hot-plug, and to save power
> consumption as much as possible. Return error and disable the enabled
> clocks and regulators when link is down,.
Maybe:
Since i.MX PCIe doesn't support hot-plug, reduce power consumption
as much as possible by disabling clocks and regulators and returning
error when the link is down.
> Add a new host_exit() callback for i.MX PCIe driver to disable the
> enabled clocks, regulators and so on in the error handling after
> host_init is finished.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 30 ++++++++++++++++++++++++---
> 1 file changed, 27 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 242d8ef73c1e..fe671e88ec93 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -848,7 +848,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> /* Start LTSSM. */
> imx6_pcie_ltssm_enable(dev);
>
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
These labels look wrong now, since you no longer reset the PHY at
err_reset_phy.
> if (pci->link_gen == 2) {
> /* Allow Gen2 mode after the link is up. */
> @@ -884,7 +886,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> }
>
> /* Make sure link training is finished as well! */
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
> } else {
> dev_info(dev, "Link: Gen2 disabled\n");
> }
> @@ -897,7 +901,6 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> - imx6_pcie_reset_phy(imx6_pcie);
> return ret;
> }
>
> @@ -921,8 +924,29 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
> return 0;
> }
>
> +static void imx6_pcie_host_exit(struct pcie_port *pp)
> +{
> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct device *dev = pci->dev;
> + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
> +
> + imx6_pcie_reset_phy(imx6_pcie);
> + imx6_pcie_clk_disable(imx6_pcie);
> + switch (imx6_pcie->drvdata->variant) {
> + case IMX8MM:
> + if (phy_power_off(imx6_pcie->phy))
> + dev_err(dev, "unable to power off phy\n");
> + break;
> + default:
> + break;
> + }
> + if (imx6_pcie->vpcie)
> + regulator_disable(imx6_pcie->vpcie);
> +}
> +
> static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
> .host_init = imx6_pcie_host_init,
> + .host_exit = imx6_pcie_host_exit,
> };
>
> static const struct dw_pcie_ops dw_pcie_ops = {
> --
> 2.25.1
>
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