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Message-ID: <AS8PR04MB8676DCB7CB8D94B0CBC97D0B8C3D9@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date: Thu, 24 Feb 2022 07:50:09 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"broonie@...nel.org" <broonie@...nel.org>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"festevam@...il.com" <festevam@...il.com>,
"francesco.dolcini@...adex.com" <francesco.dolcini@...adex.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
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dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v7 8/8] PCI: imx6: Add the compliance tests mode support
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@...nel.org>
> Sent: 2022年2月24日 1:40
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: l.stach@...gutronix.de; bhelgaas@...gle.com; broonie@...nel.org;
> lorenzo.pieralisi@....com; jingoohan1@...il.com; festevam@...il.com;
> francesco.dolcini@...adex.com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> kernel@...gutronix.de; dl-linux-imx <linux-imx@....com>
> Subject: Re: [PATCH v7 8/8] PCI: imx6: Add the compliance tests mode support
>
> In subject:
>
> s/Add the/Add/
>
> On Wed, Feb 16, 2022 at 02:21:03PM +0800, Richard Zhu wrote:
> > Refer to the system board signal Quality of PCIe archiecture PHY test
> > specification. Signal quality tests(for example: jitters,
> > differential eye opening and so on ) can be executed with devices in
> > the polling.compliance state.
>
> s/archiecture/architecture/
> s/tests(for/tests (for/
> s/jitters, /jitter, / (remove double space)
> s/so on )/so on)/
Got that. Thanks for your kindly review comments.
>
> Is this a reference to a spec? If so, I can't tell the name of the spec, the
> revision, or the section number.
Yes, it is a reference to a spec. How about change them to the following?
PCI: imx6: Add compliance tests mode support
Refer to the Chapter 3.2 System Board Signal Quality of PCI Express
Architecture PHY Test Specification Revision 2.0.
Signal quality tests (for example: jitter, differential eye opening and
so on) can be executed with devices in the polling.compliance state.
To let the device support polling.compliance state, the clocks and powers
shouldn't be turned off when the probe of device driver fails.
Based on CLB (Compliance Load Board) Test Fixture and so on test
equipments, the PHY link would be down during the compliance tests.
Refer to this scenario, add the i.MX PCIe compliance tests mode enable
support, and keep the clocks and powers on, and finish the driver probe
without error return.
Use the "pci_imx6.compliance=1" in kernel command line to enable the
compliance tests mode.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
>
> > To let the device support polling.compliance stat, the clocks and
> > powers shouldn't be turned off when the probe of device driver is failed.
>
> s/stat/state/
> s/powers/power/
> s/driver is failed/driver fails/
Okay.
>
> > Based on CLB(Compliance Load Board) Test Fixture and so on test
> > equipments, the PHY link would be down during the compliance tests.
> > Refer to this scenario, add the i.MX PCIe compliance tests mode enable
> > support, and keep the clocks and powers on, and finish the driver
> > probe without error return.
>
> s/CLB(Compliance/CLB (Compliance/
Okay. Would be updated later.
>
> > Use the "pci_imx6.compliance=1" in kernel command line to enable the
> > compliance tests mode.
>
> Thanks for including this in the commit log!
>
> > ret = dw_pcie_host_init(&pci->pp);
> > - if (ret < 0)
> > + if (ret < 0) {
> > + if (imx6_pcie_cmp_mode) {
> > + dev_info(dev, "Driver loaded with compliance test mode
> > +enabled.\n");
>
> To match other messages:
>
> s/Driver loaded/driver loaded/
> s/enabled./enabled/
Okay.
>
> > + ret = 0;
> > + } else {
> > + dev_err(dev, "Unable to add pcie port.\n");
>
> s/Unable/unable/
> s/pcie/PCIe/
> s/port./port/
Okay, would be updated later.
Thanks.
Best Regards
Richard Zhu
>
> > + }
> > return ret;
> > + }
> >
> > if (pci_msi_enabled()) {
> > u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> > --
> > 2.25.1
> >
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