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Message-ID: <YhfFXowro9PlLxyv@piout.net>
Date: Thu, 24 Feb 2022 18:50:22 +0100
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
To: Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc: Hari Prasath <Hari.PrasathGE@...rochip.com>,
claudiu.beznea@...rochip.com, davem@...emloft.net,
ludovic.desroches@...rochip.com, robh+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux@...linux.org.uk
Subject: Re: [PATCH] 1/3] ARM: dts: at91: sama7g5: Restrict ns_sram
On 24/02/2022 16:47:03+0100, Nicolas Ferre wrote:
> On 22/02/2022 at 21:46, Alexandre Belloni wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > On 22/02/2022 17:09:22+0530, Hari Prasath wrote:
> > > Limit the size of SRAM available for the rest of kernel via genalloc API's to
> > > 13k. The rest of the SRAM is used by CAN controllers and hence this restriction.
> > >
> >
> > Certainly not, if the can controller need the SRAM, they have to
> > allocate it properly.
>
> I'm not sure that bosh mcan driver can be used with dynamic allocation of
> SRAM. Is it what you're thinking about?
>
Yes, simply add a new compatible and do the allocation where necessary.
IT would be just like how we have different compatible strings for every
different macb integrations.
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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