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Message-ID: <f254f644-f053-5bb5-e806-402ef76a9e38@microchip.com>
Date: Thu, 24 Feb 2022 16:50:01 +0100
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
To: Hari Prasath <Hari.PrasathGE@...rochip.com>,
<claudiu.beznea@...rochip.com>, <davem@...emloft.net>,
<alexandre.belloni@...tlin.com>, <ludovic.desroches@...rochip.com>,
<robh+dt@...nel.org>, <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux@...linux.org.uk>
Subject: Re: [PATCH] 1/3] ARM: dts: at91: sama7g5: Restrict ns_sram
On 22/02/2022 at 12:39, Hari Prasath wrote:
> Limit the size of SRAM available for the rest of kernel via genalloc API's to
> 13k. The rest of the SRAM is used by CAN controllers and hence this restriction.
>
> Signed-off-by: Hari Prasath <Hari.PrasathGE@...rochip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
Patches 2-3 taken for 5.18.
Best regards,
Nicolas
> ---
> arch/arm/boot/dts/sama7g5.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index eddcfbf4d223..6c7012f74b10 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -65,7 +65,7 @@
> compatible = "mmio-sram";
> #address-cells = <1>;
> #size-cells = <1>;
> - reg = <0x100000 0x20000>;
> + reg = <0x100000 0x3400>;
> ranges;
> };
>
--
Nicolas Ferre
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