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Message-ID: <202203010220.Yzk53fCj-lkp@intel.com>
Date: Tue, 1 Mar 2022 02:38:31 +0800
From: kernel test robot <lkp@...el.com>
To: Christophe Leroy <christophe.leroy@...roup.eu>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Pratyush Yadav <p.yadav@...com>
Cc: kbuild-all@...ts.01.org,
Christophe Leroy <christophe.leroy@...roup.eu>,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits
Hi Christophe,
I love your patch! Perhaps something to improve:
[auto build test WARNING on v5.17-rc6]
[cannot apply to broonie-spi/for-next next-20220228]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Christophe-Leroy/Add-support-for-components-requiring-trailing-clock-after-transfer/20220228-231740
base: 7e57714cd0ad2d5bb90e50b5096a0e671dec1ef3
config: mips-allyesconfig (https://download.01.org/0day-ci/archive/20220301/202203010220.Yzk53fCj-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/7eb07c4d26401389204fcc6cf685c18c89b64ef8
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Christophe-Leroy/Add-support-for-components-requiring-trailing-clock-after-transfer/20220228-231740
git checkout 7eb07c4d26401389204fcc6cf685c18c89b64ef8
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=mips SHELL=/bin/bash drivers/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
drivers/spi/spi-fsl-spi.c: In function 'fsl_spi_do_one_msg':
>> drivers/spi/spi-fsl-spi.c:435:35: warning: initialization of 'const void *' from 'long unsigned int' makes pointer from integer without a cast [-Wint-conversion]
435 | .tx_buf = empty_zero_page,
| ^~~~~~~~~~~~~~~
drivers/spi/spi-fsl-spi.c:435:35: note: (near initialization for 't.tx_buf')
vim +435 drivers/spi/spi-fsl-spi.c
356
357 static int fsl_spi_do_one_msg(struct spi_master *master,
358 struct spi_message *m)
359 {
360 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
361 struct spi_device *spi = m->spi;
362 struct spi_transfer *t, *first;
363 unsigned int cs_change;
364 const int nsecs = 50;
365 int status, last_bpw;
366
367 /*
368 * In CPU mode, optimize large byte transfers to use larger
369 * bits_per_word values to reduce number of interrupts taken.
370 */
371 if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) {
372 list_for_each_entry(t, &m->transfers, transfer_list) {
373 if (t->len < 256 || t->bits_per_word != 8)
374 continue;
375 if ((t->len & 3) == 0)
376 t->bits_per_word = 32;
377 else if ((t->len & 1) == 0)
378 t->bits_per_word = 16;
379 }
380 }
381
382 /* Don't allow changes if CS is active */
383 cs_change = 1;
384 list_for_each_entry(t, &m->transfers, transfer_list) {
385 if (cs_change)
386 first = t;
387 cs_change = t->cs_change;
388 if (first->speed_hz != t->speed_hz) {
389 dev_err(&spi->dev,
390 "speed_hz cannot change while CS is active\n");
391 return -EINVAL;
392 }
393 }
394
395 last_bpw = -1;
396 cs_change = 1;
397 status = -EINVAL;
398 list_for_each_entry(t, &m->transfers, transfer_list) {
399 if (cs_change || last_bpw != t->bits_per_word)
400 status = fsl_spi_setup_transfer(spi, t);
401 if (status < 0)
402 break;
403 last_bpw = t->bits_per_word;
404
405 if (cs_change) {
406 fsl_spi_chipselect(spi, BITBANG_CS_ACTIVE);
407 ndelay(nsecs);
408 }
409 cs_change = t->cs_change;
410 if (t->len)
411 status = fsl_spi_bufs(spi, t, m->is_dma_mapped);
412 if (status) {
413 status = -EMSGSIZE;
414 break;
415 }
416 m->actual_length += t->len;
417
418 spi_transfer_delay_exec(t);
419
420 if (cs_change) {
421 ndelay(nsecs);
422 fsl_spi_chipselect(spi, BITBANG_CS_INACTIVE);
423 ndelay(nsecs);
424 }
425 }
426
427 if (status || !cs_change) {
428 ndelay(nsecs);
429 fsl_spi_chipselect(spi, BITBANG_CS_INACTIVE);
430 }
431
432 if (!status && spi->trailing_bits) {
433 struct spi_transfer t = {
434 .len = 1,
> 435 .tx_buf = empty_zero_page,
436 };
437
438 if (spi->trailing_bits < 4)
439 t.bits_per_word = 4;
440 else if (spi->trailing_bits > 8)
441 t.bits_per_word = 16;
442 else
443 t.bits_per_word = spi->trailing_bits;
444
445 status = fsl_spi_setup_transfer(spi, &t);
446 if (!status)
447 status = fsl_spi_bufs(spi, &t, 0);
448 }
449 m->status = status;
450
451 fsl_spi_setup_transfer(spi, NULL);
452 spi_finalize_current_message(master);
453 return 0;
454 }
455
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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