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Message-ID: <YhzMDU5kz3QERByJ@sirena.org.uk>
Date: Mon, 28 Feb 2022 13:20:13 +0000
From: Mark Brown <broonie@...nel.org>
To: Christophe Leroy <christophe.leroy@...roup.eu>
Cc: Rob Herring <robh+dt@...nel.org>, Pratyush Yadav <p.yadav@...com>,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v1 2/2] spi: fsl-spi: Implement trailing clock mode
On Sun, Feb 27, 2022 at 11:00:35AM +0100, Christophe Leroy wrote:
> + if (!status && spi->mode & SPI_TRAILING) {
> + struct spi_transfer t = {
> + .len = 1,
> + .tx_buf = "",
> + .bits_per_word = 4
> + };
> +
> + status = fsl_spi_setup_transfer(spi, &t);
> + if (!status)
> + status = fsl_spi_bufs(spi, &t, 0);
> + }
> + m->status = status;
This seems to be begging for a generic implementation in the core rather
than being driver specific - drivers would for the most part need
updating to advertise less than 8 bit per word transfers but the basic
operation isn't really device specific and it pretty much fits with the
existing interfaces.
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