linux-kernel - Re: [PATCH v4 05/27] bus: mhi: Use bitfield operations for handling DWORDs of ring elements

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Message-ID: <c8bb126e-f71c-8ae7-74a3-46e05c803255@linaro.org>
Date:   Mon, 28 Feb 2022 09:11:00 -0600
From:   Alex Elder <elder@...aro.org>
To:     'Manivannan Sadhasivam' <manivannan.sadhasivam@...aro.org>,
        David Laight <David.Laight@...LAB.COM>
Cc:     "mhi@...ts.linux.dev" <mhi@...ts.linux.dev>,
        "quic_hemantk@...cinc.com" <quic_hemantk@...cinc.com>,
        "quic_bbhatt@...cinc.com" <quic_bbhatt@...cinc.com>,
        "quic_jhugo@...cinc.com" <quic_jhugo@...cinc.com>,
        "vinod.koul@...aro.org" <vinod.koul@...aro.org>,
        "bjorn.andersson@...aro.org" <bjorn.andersson@...aro.org>,
        "dmitry.baryshkov@...aro.org" <dmitry.baryshkov@...aro.org>,
        "quic_vbadigan@...cinc.com" <quic_vbadigan@...cinc.com>,
        "quic_cang@...cinc.com" <quic_cang@...cinc.com>,
        "quic_skananth@...cinc.com" <quic_skananth@...cinc.com>,
        "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 05/27] bus: mhi: Use bitfield operations for handling
 DWORDs of ring elements

On 2/28/22 8:43 AM, 'Manivannan Sadhasivam' wrote:
> On Mon, Feb 28, 2022 at 02:00:07PM +0000, David Laight wrote:
>> From: Manivannan Sadhasivam
>>> Sent: 28 February 2022 12:43
>>>
>>> Instead of using the hardcoded bits in DWORD definitions, let's use the
>>> bitfield operations to make it more clear how the DWORDs are structured.
>>
>> That all makes it as clear as mud.
> 
> It depends on how you see it ;)

It's possible David was commenting on the description, but I'm not sure.

> For instance,
> 
> #define MHI_TRE_GET_CMD_TYPE(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 16) & 0xFF)
> 
> vs
> 
> #define MHI_TRE_GET_CMD_TYPE(tre) (FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 1))))

Maybe you should create a static inline function to
encapsulate this (and the same for others).

In other words, something like:

#define MHI_TRE_DWORD_1_CMD_TYPE_MASK	GENMASK(23, 16)

static inline enum mhi_pkt_type
mhi_tre_cmd_type(struct mhi_ring_element el)
{
	u32 dword = le32_to_cpu(el->dword[1]);
	enum mhi_pkt_type cmd_type;

	return FIELD_GET(MHI_TRE_DWORD_1_CMD_TYPE_MASK, dword);
}

It's still a little messy, but breaking it out makes it a
little easier to understand, and the function makes the
types involved a little more obvious.

					-Alex

> The later one makes it more obvious that the "type" field resides between bit 23
> and 16. Plus it avoids the extra masking.
> 
>> Try reading it!
>>
> 
> Well I did before sending the patch.
> 
> Thanks,
> Mani
> 
>> 	David
>>
>>>
>>> Suggested-by: Alex Elder <elder@...aro.org>
>>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>>> ---
>>>   drivers/bus/mhi/host/internal.h | 58 +++++++++++++++++++--------------
>>>   1 file changed, 33 insertions(+), 25 deletions(-)
>>>
>>> diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h
>>> index 156bf65b6810..1d1790e83a93 100644
>>> --- a/drivers/bus/mhi/host/internal.h
>>> +++ b/drivers/bus/mhi/host/internal.h
>>> @@ -7,6 +7,7 @@
>>>   #ifndef _MHI_INT_H
>>>   #define _MHI_INT_H
>>>
>>> +#include <linux/bitfield.h>
>>>   #include <linux/mhi.h>
>>>
>>>   extern struct bus_type mhi_bus_type;
>>> @@ -205,58 +206,65 @@ enum mhi_cmd_type {
>>>   /* No operation command */
>>>   #define MHI_TRE_CMD_NOOP_PTR (0)
>>>   #define MHI_TRE_CMD_NOOP_DWORD0 (0)
>>> -#define MHI_TRE_CMD_NOOP_DWORD1 (cpu_to_le32(MHI_CMD_NOP << 16))
>>> +#define MHI_TRE_CMD_NOOP_DWORD1 (cpu_to_le32(FIELD_PREP(GENMASK(23, 16), MHI_CMD_NOP)))
>>>
>>>   /* Channel reset command */
>>>   #define MHI_TRE_CMD_RESET_PTR (0)
>>>   #define MHI_TRE_CMD_RESET_DWORD0 (0)
>>> -#define MHI_TRE_CMD_RESET_DWORD1(chid) (cpu_to_le32((chid << 24) | \
>>> -					(MHI_CMD_RESET_CHAN << 16)))
>>> +#define MHI_TRE_CMD_RESET_DWORD1(chid) (cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid)) | \
>>> +					FIELD_PREP(GENMASK(23, 16), MHI_CMD_RESET_CHAN))
>>>
>>>   /* Channel stop command */
>>>   #define MHI_TRE_CMD_STOP_PTR (0)
>>>   #define MHI_TRE_CMD_STOP_DWORD0 (0)
>>> -#define MHI_TRE_CMD_STOP_DWORD1(chid) (cpu_to_le32((chid << 24) | \
>>> -				       (MHI_CMD_STOP_CHAN << 16)))
>>> +#define MHI_TRE_CMD_STOP_DWORD1(chid) (cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid)) | \
>>> +					FIELD_PREP(GENMASK(23, 16), MHI_CMD_STOP_CHAN))
>>>
>>>   /* Channel start command */
>>>   #define MHI_TRE_CMD_START_PTR (0)
>>>   #define MHI_TRE_CMD_START_DWORD0 (0)
>>> -#define MHI_TRE_CMD_START_DWORD1(chid) (cpu_to_le32((chid << 24) | \
>>> -					(MHI_CMD_START_CHAN << 16)))
>>> +#define MHI_TRE_CMD_START_DWORD1(chid) (cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid)) | \
>>> +					FIELD_PREP(GENMASK(23, 16), MHI_CMD_START_CHAN))
>>>
>>>   #define MHI_TRE_GET_DWORD(tre, word) (le32_to_cpu((tre)->dword[(word)]))
>>> -#define MHI_TRE_GET_CMD_CHID(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 24) & 0xFF)
>>> -#define MHI_TRE_GET_CMD_TYPE(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 16) & 0xFF)
>>> +#define MHI_TRE_GET_CMD_CHID(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 1))))
>>> +#define MHI_TRE_GET_CMD_TYPE(tre) (FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 1))))
>>>
>>>   /* Event descriptor macros */
>>>   #define MHI_TRE_EV_PTR(ptr) (cpu_to_le64(ptr))
>>> -#define MHI_TRE_EV_DWORD0(code, len) (cpu_to_le32((code << 24) | len))
>>> -#define MHI_TRE_EV_DWORD1(chid, type) (cpu_to_le32((chid << 24) | (type << 16)))
>>> +#define MHI_TRE_EV_DWORD0(code, len) (cpu_to_le32(FIELD_PREP(GENMASK(31, 24), code) | \
>>> +						FIELD_PREP(GENMASK(15, 0), len)))
>>> +#define MHI_TRE_EV_DWORD1(chid, type) (cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \
>>> +						FIELD_PREP(GENMASK(23, 16), type)))
>>>   #define MHI_TRE_GET_EV_PTR(tre) (le64_to_cpu((tre)->ptr))
>>> -#define MHI_TRE_GET_EV_CODE(tre) ((MHI_TRE_GET_DWORD(tre, 0) >> 24) & 0xFF)
>>> -#define MHI_TRE_GET_EV_LEN(tre) (MHI_TRE_GET_DWORD(tre, 0) & 0xFFFF)
>>> -#define MHI_TRE_GET_EV_CHID(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 24) & 0xFF)
>>> -#define MHI_TRE_GET_EV_TYPE(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 16) & 0xFF)
>>> -#define MHI_TRE_GET_EV_STATE(tre) ((MHI_TRE_GET_DWORD(tre, 0) >> 24) & 0xFF)
>>> -#define MHI_TRE_GET_EV_EXECENV(tre) ((MHI_TRE_GET_DWORD(tre, 0) >> 24) & 0xFF)
>>> +#define MHI_TRE_GET_EV_CODE(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0))))
>>> +#define MHI_TRE_GET_EV_LEN(tre) (FIELD_GET(GENMASK(15, 0), (MHI_TRE_GET_DWORD(tre, 0))))
>>> +#define MHI_TRE_GET_EV_CHID(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 1))))
>>> +#define MHI_TRE_GET_EV_TYPE(tre) (FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 1))))
>>> +#define MHI_TRE_GET_EV_STATE(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0))))
>>> +#define MHI_TRE_GET_EV_EXECENV(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0))))
>>>   #define MHI_TRE_GET_EV_SEQ(tre) MHI_TRE_GET_DWORD(tre, 0)
>>>   #define MHI_TRE_GET_EV_TIME(tre) (MHI_TRE_GET_EV_PTR(tre))
>>>   #define MHI_TRE_GET_EV_COOKIE(tre) lower_32_bits(MHI_TRE_GET_EV_PTR(tre))
>>> -#define MHI_TRE_GET_EV_VEID(tre) ((MHI_TRE_GET_DWORD(tre, 0) >> 16) & 0xFF)
>>> -#define MHI_TRE_GET_EV_LINKSPEED(tre) ((MHI_TRE_GET_DWORD(tre, 1) >> 24) & 0xFF)
>>> -#define MHI_TRE_GET_EV_LINKWIDTH(tre) (MHI_TRE_GET_DWORD(tre, 0) & 0xFF)
>>> +#define MHI_TRE_GET_EV_VEID(tre) (FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 0))))
>>> +#define MHI_TRE_GET_EV_LINKSPEED(tre) (FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 1))))
>>> +#define MHI_TRE_GET_EV_LINKWIDTH(tre) (FIELD_GET(GENMASK(7, 0), (MHI_TRE_GET_DWORD(tre, 0))))
>>>
>>>   /* Transfer descriptor macros */
>>>   #define MHI_TRE_DATA_PTR(ptr) (cpu_to_le64(ptr))
>>> -#define MHI_TRE_DATA_DWORD0(len) (cpu_to_le32(len & MHI_MAX_MTU))
>>> -#define MHI_TRE_DATA_DWORD1(bei, ieot, ieob, chain) (cpu_to_le32((2 << 16) | (bei << 10) \
>>> -	| (ieot << 9) | (ieob << 8) | chain))
>>> +#define MHI_TRE_DATA_DWORD0(len) (cpu_to_le32(FIELD_PREP(GENMASK(15, 0), len)))
>>> +#define MHI_TRE_TYPE_TRANSFER 2
>>> +#define MHI_TRE_DATA_DWORD1(bei, ieot, ieob, chain) (cpu_to_le32(FIELD_PREP(GENMASK(23, 16), \
>>> +							MHI_TRE_TYPE_TRANSFER) | \
>>> +							FIELD_PREP(BIT(10), bei) | \
>>> +							FIELD_PREP(BIT(9), ieot) | \
>>> +							FIELD_PREP(BIT(8), ieob) | \
>>> +							FIELD_PREP(BIT(0), chain)))
>>>
>>>   /* RSC transfer descriptor macros */
>>> -#define MHI_RSCTRE_DATA_PTR(ptr, len) (cpu_to_le64(((u64)len << 48) | ptr))
>>> +#define MHI_RSCTRE_DATA_PTR(ptr, len) (cpu_to_le64(FIELD_PREP(GENMASK(64, 48), len) | ptr))
>>>   #define MHI_RSCTRE_DATA_DWORD0(cookie) (cpu_to_le32(cookie))
>>> -#define MHI_RSCTRE_DATA_DWORD1 (cpu_to_le32(MHI_PKT_TYPE_COALESCING << 16))
>>> +#define MHI_RSCTRE_DATA_DWORD1 (cpu_to_le32(FIELD_PREP(GENMASK(23, 16), MHI_PKT_TYPE_COALESCING)
>>>
>>>   enum mhi_pkt_type {
>>>   	MHI_PKT_TYPE_INVALID = 0x0,
>>> --
>>> 2.25.1
>>
>> -
>> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
>> Registration No: 1397386 (Wales)
>>