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Message-ID: <23f86de0-3869-ee22-812d-ba610bac48b3@linaro.org>
Date:   Wed, 2 Mar 2022 11:24:18 +0100
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     "Sanil, Shruthi" <shruthi.sanil@...el.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Cc:     "andriy.shevchenko@...ux.intel.com" 
        <andriy.shevchenko@...ux.intel.com>,
        "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "Thokala, Srikanth" <srikanth.thokala@...el.com>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>
Subject: Re: [PATCH v8 2/2] clocksource: Add Intel Keem Bay timer support

On 02/03/2022 11:12, Sanil, Shruthi wrote:

[ ... ]

>>> +	if (!(val & TIM_CONFIG_PRESCALER_ENABLE)) {
>>> +		pr_err("%pOF: Prescaler is not enabled\n", np);
>>> +		ret = -ENODEV;
>>> +	}
>>
>> Why bail out instead of enabling the prescalar ?
> 
> Because it is a secure register and it would be updated by the bootloader.
Should it be considered as a firmware bug ?

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