[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220304114110.3939390-1-kieran.bingham+renesas@ideasonboard.com>
Date: Fri, 4 Mar 2022 11:41:10 +0000
From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
To: Geert Uytterhoeven <geert@...der.be>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org
Cc: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86
The INTC block is a better choice for handling the interrupts on the V3U
as the INTC will always be powered, while the GPIO block may be
de-clocked if not in use. Further more, it may be likely to have a lower
power consumption as it does not need to drive the pins.
Switch the interrupt parent and interrupts definition from gpio1 to
intc_ex, allowing the PFC to configure the pin muxing accordingly.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
---
arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index 6af3f4f4f268..b7254a0f08b6 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -198,8 +198,8 @@ bridge@2c {
clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&intc_ex>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
vccio-supply = <®_1p8v>;
vpll-supply = <®_1p8v>;
--
2.32.0
Powered by blists - more mailing lists