lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 8 Mar 2022 19:25:47 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Jim Mattson <jmattson@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        Sean Christopherson <seanjc@...gle.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Joerg Roedel <joro@...tes.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 12/12] KVM: x86/pmu: Clear reserved bit PERF_CTL2[43]
 for AMD erratum 1292

On 5/3/2022 3:06 am, Jim Mattson wrote:
> We should continue to synthesize a #GP for an attempt to set "must be
> zero" bits or for rule violations, like "address must be canonical."

Actually, I do stand in the same position as you.

> However, we have absolutely no business making up our own hardware
> specification. This is a bug, and it should be fixed, like any other
> bug.
Current virtual hardware interfaces do not strictly comply with vendor 
specifications
and may not be the same in the first step of enablement, or some of them may have
to be compromised later out of various complexity.

The behavior of AMD's "synthesize a #GP" to "reserved without qualification" bits
is clearly a legacy tech decision (not sure if it was intentional). We may need 
a larger
independent patch set to apply this one-time surgery, including of course this 
pmu issue.

What do you think ?




Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ