linux-kernel - Re: [PATCH 2/2] clk: zynq: Update the parameters to zynq_clk_register_periph

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Message-Id: <20220312022628.3DFE7C340E9@smtp.kernel.org>
Date:   Fri, 11 Mar 2022 18:26:26 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>,
        linux-clk@...r.kernel.org
Cc:     git@...inx.com, michal.simek@...inx.com,
        linux-kernel@...r.kernel.org,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
Subject: Re: [PATCH 2/2] clk: zynq: Update the parameters to zynq_clk_register_periph_clk

Quoting Shubhrajyoti Datta (2022-02-22 05:09:03)
> In case there are only one gate or the two_gate is 0 the clk1 clock
> passed is not used. We are passing 0 which is arm_pll.
> Pass a invalid clock instead.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> ---

Applied to clk-next