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Message-ID: <YiwGFmbXw0qwM9mx@latitude>
Date: Sat, 12 Mar 2022 03:31:50 +0100
From: Jonathan Neuschäfer <j.neuschaefer@....net>
To: Medad CChien <medadyoung@...il.com>
Cc: rric@...nel.org, james.morse@....com, tony.luck@...el.com,
mchehab@...nel.org, bp@...en8.de, robh+dt@...nel.org,
benjaminfair@...gle.com, yuenn@...gle.com, venture@...gle.com,
KWLIU@...oton.com, YSCHU@...oton.com, JJLIU0@...oton.com,
KFTING@...oton.com, avifishman70@...il.com, tmaimon77@...il.com,
tali.perry1@...il.com, ctcchien@...oton.com,
devicetree@...r.kernel.org, openbmc@...ts.ozlabs.org,
linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org
Subject: Re: [PATCH v3 1/3] ARM: dts: nuvoton: Add new device node
>Subject: [PATCH v3 1/3] ARM: dts: nuvoton: Add new device node
To make it more obvious what this patch is about, I suggest something like:
[PATCH v3 1/3] ARM: dts: nuvoton: Add memory controller node
This arguably makes the next line in the commit message redundant,
but there is other useful information that can be added there, if you
like, such as how the kernel is going to use the memory controller.
Best regards,
Jonathan
On Fri, Mar 11, 2022 at 09:42:43AM +0800, Medad CChien wrote:
> Add NPCM memory controller device node
>
> Signed-off-by: Medad CChien <ctcchien@...oton.com>
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> index 3696980a3da1..ba542b26941e 100644
> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> @@ -106,6 +106,13 @@
> interrupt-parent = <&gic>;
> ranges;
>
> + mc: memory-controller@...24000 {
> + compatible = "nuvoton,npcm750-memory-controller";
> + reg = <0x0 0xf0824000 0x0 0x1000>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> rstc: rstc@...01000 {
> compatible = "nuvoton,npcm750-reset";
> reg = <0xf0801000 0x70>;
> --
> 2.17.1
>
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