linux-kernel - [PATCH] arm64: tegra: Update SDMMC1/3 clock source for Tegra194

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Message-ID: <1647423885-2569-1-git-send-email-anrao@nvidia.com>
Date:   Wed, 16 Mar 2022 15:14:45 +0530
From:   Aniruddha Rao <anrao@...dia.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>
CC:     <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        "Aniruddha Rao" <anrao@...dia.com>
Subject: [PATCH] arm64: tegra: Update SDMMC1/3 clock source for Tegra194

The default parent for SDMMC1/3 clock sources can provide maximum frequency
of 136MHz for SDR104 mode.
Update parent clock source for SDMMC1/SDMMC3 instances
to increase the output clock frequency to 195MHz and improve the perf.

Signed-off-by: Aniruddha Rao <anrao@...dia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index aaa00da..a6e4b53 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -887,6 +887,11 @@
 			clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
 				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
 			clock-names = "sdhci", "tmclk";
+			assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
+					  <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+			assigned-clock-parents =
+					  <&bpmp TEGRA194_CLK_PLLC4_MUXED>,
+					  <&bpmp TEGRA194_CLK_PLLC4_VCO_DIV2>;
 			resets = <&bpmp TEGRA194_RESET_SDMMC1>;
 			reset-names = "sdhci";
 			interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
@@ -921,6 +926,11 @@
 			clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
 				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
 			clock-names = "sdhci", "tmclk";
+			assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
+					  <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+			assigned-clock-parents =
+					  <&bpmp TEGRA194_CLK_PLLC4_MUXED>,
+					  <&bpmp TEGRA194_CLK_PLLC4_VCO_DIV2>;
 			resets = <&bpmp TEGRA194_RESET_SDMMC3>;
 			reset-names = "sdhci";
 			interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
-- 
2.7.4