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Message-ID: <YjNf827KuySLowK1@aptenodytes>
Date: Thu, 17 Mar 2022 17:21:07 +0100
From: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
To: Sakari Ailus <sakari.ailus@...ux.intel.com>
Cc: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
Yong Deng <yong.deng@...ewell.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Hans Verkuil <hans.verkuil@...co.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Maxime Ripard <mripard@...nel.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v3 7/9] dt-bindings: media: Add Allwinner A83T MIPI CSI-2
bindings documentation
Hi Sakari,
On Wed 16 Mar 22, 15:26, Sakari Ailus wrote:
> Hi Paul,
>
> Thanks for the patch.
And thanks for the review!
> On Wed, Mar 02, 2022 at 11:07:37PM +0100, Paul Kocialkowski wrote:
> > This introduces YAML bindings documentation for the Allwinner A83T
> > MIPI CSI-2 controller.
> >
> > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
> > Reviewed-by: Rob Herring <robh@...nel.org>
> > ---
> > .../media/allwinner,sun8i-a83t-mipi-csi2.yaml | 138 ++++++++++++++++++
> > 1 file changed, 138 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml
> > new file mode 100644
> > index 000000000000..75121b402435
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml
> > @@ -0,0 +1,138 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Allwinner A83T MIPI CSI-2 Device Tree Bindings
> > +
> > +maintainers:
> > + - Paul Kocialkowski <paul.kocialkowski@...tlin.com>
> > +
> > +properties:
> > + compatible:
> > + const: allwinner,sun8i-a83t-mipi-csi2
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: Bus Clock
> > + - description: Module Clock
> > + - description: MIPI-specific Clock
> > + - description: Misc CSI Clock
> > +
> > + clock-names:
> > + items:
> > + - const: bus
> > + - const: mod
> > + - const: mipi
> > + - const: misc
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + description: Input port, connect to a MIPI CSI-2 sensor
> > +
> > + properties:
> > + reg:
> > + const: 0
> > +
> > + endpoint:
> > + $ref: video-interfaces.yaml#
> > + unevaluatedProperties: false
> > +
> > + properties:
> > + clock-lanes:
> > + maxItems: 1
>
> Does the hardware support lane reordering? If not, the property should be
> omitted here.
I'm not sure what this relates to. Is it about inverting the clock lane with
a data lane? I'm a bit confused about logical vs physical lane in the context
of MIPI CSI-2.
The controller has dedicated pins for the clock and data lanes and supports
filtering packets based on virtual channel or data type.
Are the clock-lanes and data-lanes only relevant for reordering?
IIRC they are also necessary to get the lanes count in the driver.
> I can also remove the three lines here while applying the patches.
I think this series will need another iteration anyway, so let's wait.
Paul
> > +
> > + data-lanes:
> > + minItems: 1
> > + maxItems: 4
> > +
> > + required:
> > + - data-lanes
> > +
> > + additionalProperties: false
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + description: Output port, connect to a CSI controller
> > +
> > + properties:
> > + reg:
> > + const: 1
> > +
> > + endpoint:
> > + $ref: video-interfaces.yaml#
> > + unevaluatedProperties: false
> > +
> > + additionalProperties: false
> > +
> > + required:
> > + - port@0
> > + - port@1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > + - resets
> > + - ports
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/clock/sun8i-a83t-ccu.h>
> > + #include <dt-bindings/reset/sun8i-a83t-ccu.h>
> > +
> > + mipi_csi2: csi@...1000 {
> > + compatible = "allwinner,sun8i-a83t-mipi-csi2";
> > + reg = <0x01cb1000 0x1000>;
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&ccu CLK_BUS_CSI>,
> > + <&ccu CLK_CSI_SCLK>,
> > + <&ccu CLK_MIPI_CSI>,
> > + <&ccu CLK_CSI_MISC>;
> > + clock-names = "bus", "mod", "mipi", "misc";
> > + resets = <&ccu RST_BUS_CSI>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + mipi_csi2_in: port@0 {
> > + reg = <0>;
> > +
> > + mipi_csi2_in_ov8865: endpoint {
> > + data-lanes = <1 2 3 4>;
> > +
> > + remote-endpoint = <&ov8865_out_mipi_csi2>;
> > + };
> > + };
> > +
> > + mipi_csi2_out: port@1 {
> > + reg = <1>;
> > +
> > + mipi_csi2_out_csi: endpoint {
> > + remote-endpoint = <&csi_in_mipi_csi2>;
> > + };
> > + };
> > + };
> > + };
> > +
> > +...
>
> --
> Kind regards,
>
> Sakari Ailus
--
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
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