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Message-ID: <YjN2qsXkmlEUTg4u@arm.com>
Date: Thu, 17 Mar 2022 17:58:02 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: David Hildenbrand <david@...hat.com>
Cc: linux-kernel@...r.kernel.org,
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Subject: Re: [PATCH v1 4/7] arm64/pgtable: support
__HAVE_ARCH_PTE_SWP_EXCLUSIVE
On Thu, Mar 17, 2022 at 11:04:18AM +0100, David Hildenbrand wrote:
> On 16.03.22 19:27, Catalin Marinas wrote:
> > On Tue, Mar 15, 2022 at 03:18:34PM +0100, David Hildenbrand wrote:
> >> @@ -909,12 +925,13 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
> >> /*
> >> * Encode and decode a swap entry:
> >> * bits 0-1: present (must be zero)
> >> - * bits 2-7: swap type
> >> + * bits 2: remember PG_anon_exclusive
> >> + * bits 3-7: swap type
> >> * bits 8-57: swap offset
> >> * bit 58: PTE_PROT_NONE (must be zero)
> >
> > I don't remember exactly why we reserved bits 0 and 1 when, from the
> > hardware perspective, it's sufficient for bit 0 to be 0 and the whole
> > pte becomes invalid. We use bit 1 as the 'table' bit (when 0 at pmd
> > level, it's a huge page) but we shouldn't check for this on a swap
> > entry.
>
> You mean
>
> arch/arm64/include/asm/pgtable-hwdef.h:#define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1)
>
> right?
Yes.
> I wonder why it even exists, for arm64 I only spot:
>
> arch/arm64/include/asm/pgtable.h:#define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
>
> I don't really see code that sets PTE_TABLE_BIT.
>
> Similarly, I don't see code that sets PMD_TABLE_BIT/PUD_TABLE_BIT/P4D_TABLE_BIT.
> Most probably setting code is not using the defines, that's why I'm not finding it.
It gets set as part of P*D_TYPE_TABLE via p*d_populate(). We use the
P*D_TABLE_BIT mostly for checking whether it's a huge page or not (the
arm64 hugetlbpage.c code).
--
Catalin
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