lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YjOw7sutyNWnbdRU@google.com>
Date:   Thu, 17 Mar 2022 15:06:38 -0700
From:   Matthias Kaehlcke <mka@...omium.org>
To:     Stephen Boyd <swboyd@...omium.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Douglas Anderson <dianders@...omium.org>,
        Alexandru M Stan <amstan@...omium.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: Fully describe fingerprint node on
 Herobrine

On Wed, Mar 16, 2022 at 06:06:40PM -0700, Stephen Boyd wrote:
> Update the fingerprint node on Herobrine to match the fingerprint DT
> binding. This will allow us to drive the reset and boot gpios from the
> driver when it is re-attached after flashing. We'll also be able to boot
> the fingerprint processor if the BIOS isn't doing it for us.
> 
> Cc: Douglas Anderson <dianders@...omium.org>
> Cc: Matthias Kaehlcke <mka@...omium.org>
> Cc: Alexandru M Stan <amstan@...omium.org>
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
> ---
> 
> Depends on https://lore.kernel.org/r/20220317005814.2496302-1-swboyd@chromium.org
> 
>  arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> index 984a7faf0888..282dda78ba3f 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> @@ -396,13 +396,16 @@ ap_spi_fp: &spi9 {
>  	cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
>  
>  	cros_ec_fp: ec@0 {
> -		compatible = "google,cros-ec-spi";
> +		compatible = "google,cros-ec-fp";
>  		reg = <0>;
>  		interrupt-parent = <&tlmm>;
>  		interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
> +		boot0-gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
> +		reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
>  		spi-max-frequency = <3000000>;
> +		vdd-supply = <&pp3300_fp_mcu>;

IIUC userspace controls this regulator. Do you add it just for completeness
even though the kernel doesn't use it?

>  	};
>  };

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ