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Message-ID: <30bb04fe-4fed-04bc-6f99-158ac09d6bb8@nvidia.com>
Date: Fri, 18 Mar 2022 08:39:30 +0000
From: Jon Hunter <jonathanh@...dia.com>
To: Sumit Gupta <sumitg@...dia.com>, rafael@...nel.org,
viresh.kumar@...aro.org, robh+dt@...nel.org, krzk+dt@...nel.org,
treding@...dia.com, linux-pm@...r.kernel.org,
linux-tegra@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: ksitaraman@...dia.com, sanjayc@...dia.com, bbasu@...dia.com
Subject: Re: [Patch v1 2/3] arm64: tegra: add node for tegra234 cpufreq
On 16/03/2022 13:58, Sumit Gupta wrote:
> Adding cclpex node to represent Tegra234 cpufreq.
> Tegra234 uses some of the CRAB (Control Register Access Bus)
> registers for cpu frequency requests. These registers are
> memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
> the range of MMCRAB registers required only for cpu frequency info.
>
> Signed-off-by: Sumit Gupta <sumitg@...dia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> index aaace605bdaa..610207f3f967 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> @@ -1258,6 +1258,13 @@
> };
> };
>
> + ccplex@...0000 {
> + compatible = "nvidia,tegra234-ccplex-cluster";
> + reg = <0x0 0x0e000000 0x0 0x5ffff>;
> + nvidia,bpmp = <&bpmp>;
> + status = "okay";
> + };
> +
> sram@...00000 {
> compatible = "nvidia,tegra234-sysram", "mmio-sram";
> reg = <0x0 0x40000000 0x0 0x80000>;
We need to add this compatible string to a DT binding doc somewhere.
Cheers
Jon
--
nvpublic
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