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Date: Fri, 18 Mar 2022 14:55:28 +0100 From: Krzysztof Kozlowski <krzk@...nel.org> To: Jianjun Wang <jianjun.wang@...iatek.com>, Chunfeng Yun <chunfeng.yun@...iatek.com>, Kishon Vijay Abraham I <kishon@...com>, Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Chen-Yu Tsai <wenst@...omium.org> Cc: linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, rex-bc.chen@...iatek.com, randy.wu@...iatek.com, jieyy.yang@...iatek.com, chuanjia.liu@...iatek.com, qizhong.cheng@...iatek.com, jian.yang@...iatek.com Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY On 18/03/2022 10:54, Jianjun Wang wrote: > Add YAML schema documentation for PCIe PHY on MediaTek chipsets. > > Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com> > --- > .../bindings/phy/mediatek,pcie-phy.yaml | 75 +++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml > new file mode 100644 > index 000000000000..868bf976568b > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml > @@ -0,0 +1,75 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek PCIe PHY > + > +maintainers: > + - Jianjun Wang <jianjun.wang@...iatek.com> > + > +description: | > + The PCIe PHY supports physical layer functionality for PCIe Gen3 port. > + > +properties: > + compatible: > + const: mediatek,mt8195-pcie-phy > + > + reg: > + maxItems: 1 > + > + reg-names: > + items: > + - const: sif > + > + "#phy-cells": > + const: 0 > + > + nvmem-cells: > + description: > + Phandles to nvmem cell that contains the efuse data, if unspecified, > + default value is used. maxItems: 7 Best regards, Krzysztof
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