linux-kernel - Re: [PATCH v3 00/15] Make ETM register accesses consistent with sysreg.h

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Message-ID: <4ef77445-b58d-a71a-0ddc-70e308ea99c8@arm.com>
Date:   Mon, 28 Mar 2022 11:41:48 +0100
From:   James Clark <james.clark@....com>
To:     Mathieu Poirier <mathieu.poirier@...aro.org>
Cc:     suzuki.poulose@....com, coresight@...ts.linaro.org,
        mike.leach@...aro.org, anshuman.khandual@....com,
        leo.yan@...aro.com, Leo Yan <leo.yan@...aro.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 00/15] Make ETM register accesses consistent with
 sysreg.h



On 23/03/2022 16:22, Mathieu Poirier wrote:
> On Fri, Mar 04, 2022 at 05:18:57PM +0000, James Clark wrote:
>> Changes since v2:
>>  * Implement Mike's suggestion of not having _SHIFT and using the existing
>>    FIELD_GET and FIELD_PREP methods.
>>  * Dropped the change to add the new REG_VAL macro because of the above.
>>  * FIELD_PREP could be used in some trivial cases, but in some cases the
>>    shift is still required but can be calculated with __bf_shf
>>  * Improved the commit messages.
>>  * The change is still binary equivalent, but requires an extra step 
>>    mentioned at the end of this cover letter.
>>
>> Applies to coresight/next 3619ee28488
>> Also available at https://gitlab.arm.com/linux-arm/linux-jc/-/tree/james-cs-register-refactor-v3
>>
>> To check for binary equivalence follow the same steps in the cover letter
>> of v2, but apply the following change to coresight-priv.h. This is because
>> the existing version of the macros wrap the expression in a new scope {}
>> that flips something in the compiler:
>>
>>   #undef FIELD_GET
>>   #define FIELD_GET(_mask, _reg) (((_reg) & (_mask)) >> __bf_shf(_mask))
>>   #undef FIELD_PREP
>>   #define FIELD_PREP(_mask, _val) (((_val) << __bf_shf(_mask)) & (_mask))
>>
>> Thanks
>> James
>>
>> James Clark (15):
>>   coresight: etm4x: Cleanup TRCIDR0 register accesses
>>   coresight: etm4x: Cleanup TRCIDR2 register accesses
>>   coresight: etm4x: Cleanup TRCIDR3 register accesses
>>   coresight: etm4x: Cleanup TRCIDR4 register accesses
>>   coresight: etm4x: Cleanup TRCIDR5 register accesses
>>   coresight: etm4x: Cleanup TRCCONFIGR register accesses
>>   coresight: etm4x: Cleanup TRCEVENTCTL1R register accesses
>>   coresight: etm4x: Cleanup TRCSTALLCTLR register accesses
>>   coresight: etm4x: Cleanup TRCVICTLR register accesses
>>   coresight: etm3x: Cleanup ETMTECR1 register accesses
>>   coresight: etm4x: Cleanup TRCACATRn register accesses
>>   coresight: etm4x: Cleanup TRCSSCCRn and TRCSSCSRn register accesses
>>   coresight: etm4x: Cleanup TRCSSPCICRn register accesses
>>   coresight: etm4x: Cleanup TRCBBCTLR register accesses
>>   coresight: etm4x: Cleanup TRCRSCTLRn register accesses
>>
>>  .../coresight/coresight-etm3x-core.c          |   2 +-
>>  .../coresight/coresight-etm3x-sysfs.c         |   2 +-
>>  .../coresight/coresight-etm4x-core.c          | 136 +++++--------
>>  .../coresight/coresight-etm4x-sysfs.c         | 180 +++++++++---------
>>  drivers/hwtracing/coresight/coresight-etm4x.h | 122 ++++++++++--
>>  5 files changed, 244 insertions(+), 198 deletions(-)
> 
> I am done reviewing this set.  I will wait until rc1 or rc2 before moving
> forward.  If there are other comments needing a respin then I will wait for the
> next revision.  Otherwise I will apply this one after correcting the extra lines
> at the end of patch 15.
>  

Thanks for the review!

> Thanks,
> Mathieu
> 
>>
>> -- 
>> 2.28.0
>>