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Message-ID: <da2351be-1fca-4269-cb7b-9dcd6a01b2dc@kernel.org>
Date: Mon, 28 Mar 2022 15:08:42 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: wangseok.lee@...sung.com,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
"kishon@...com" <kishon@...com>,
"vkoul@...nel.org" <vkoul@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"jesper.nilsson@...s.com" <jesper.nilsson@...s.com>,
"lars.persson@...s.com" <lars.persson@...s.com>
Cc: "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"kw@...ux.com" <kw@...ux.com>,
"linux-arm-kernel@...s.com" <linux-arm-kernel@...s.com>,
"kernel@...s.com" <kernel@...s.com>,
전문기 <moonki.jun@...sung.com>
Subject: Re: [PATCH 4/5] phy: Add ARTPEC-8 PCIe PHY driver
On 28/03/2022 04:18, 이왕석 wrote:
> Add support Axis, ARTPEC-8 SoC.
> ARTPEC-8 is the SoC platform of Axis Communications.
> This is based on arm64 and support GEN4 & 2lane.
> This driver provides PHY interface for ARTPEC-8 SoC PCIe controller,
> based on Samsung PCIe PHY IP.
>
You already sent it on 28th of January and did not respond to my comments.
Please do not resend same/similar code, but instead respond to comments
received earlier.
Best regards,
Krzysztof
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