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Message-ID: <20220329071526.10298-1-jianjun.wang@mediatek.com>
Date: Tue, 29 Mar 2022 15:15:26 +0800
From: Jianjun Wang <jianjun.wang@...iatek.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: Ryder Lee <ryder.lee@...iatek.com>,
Jianjun Wang <jianjun.wang@...iatek.com>,
<linux-pci@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
"allen-kh . cheng" <allen-kh.cheng@...iatek.com>
Subject: [PATCH RFC] dt-bindings: PCI: mediatek-gen3: Remove clock-names
Some SoC may have different clocks (e.g. MT8192 uses clock 'top_133m',
but MT8195 use clock 'peri_mem' instead), since these clocks do not have
any timing dependencies and the PCIe controller driver uses
'devm_clk_bulk_get_all' to gets all of them, remove 'clock-names' in
dt-bindings file for compatible with different SoCs.
Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com>
---
.../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 0499b94627ae..dc261c3d2570 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -77,15 +77,6 @@ properties:
clocks:
maxItems: 6
- clock-names:
- items:
- - const: pl_250m
- - const: tl_26m
- - const: tl_96m
- - const: tl_32k
- - const: peri_26m
- - const: top_133m
-
assigned-clocks:
maxItems: 1
@@ -157,8 +148,6 @@ examples:
<&infracfg 97>,
<&infracfg 99>,
<&infracfg 111>;
- clock-names = "pl_250m", "tl_26m", "tl_96m",
- "tl_32k", "peri_26m", "top_133m";
assigned-clocks = <&topckgen 50>;
assigned-clock-parents = <&topckgen 91>;
--
2.18.0
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